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Commit 588d7d12 authored by Francisco Jerez's avatar Francisco Jerez Committed by Ben Skeggs
Browse files

drm/nouveau: Add cache_flush/pull fifo engine functions. 



Signed-off-by: default avatarFrancisco Jerez <currojerez@riseup.net>
parent e8d6d615

drivers/gpu/drm/nouveau/nouveau_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -292,6 +292,8 @@ struct nouveau_fifo_engine { 
	void (*disable)(struct drm_device *);

	void (*enable)(struct drm_device *);

	bool (*reassign)(struct drm_device *, bool enable);

	bool (*cache_flush)(struct drm_device *dev);

	bool (*cache_pull)(struct drm_device *dev, bool enable);



	int  (*channel_id)(struct drm_device *);
@@ -889,6 +891,8 @@ extern int nv04_fifo_init(struct drm_device *); 
extern void nv04_fifo_disable(struct drm_device *);

extern void nv04_fifo_enable(struct drm_device *);

extern bool nv04_fifo_reassign(struct drm_device *, bool);

extern bool nv04_fifo_cache_flush(struct drm_device *);

extern bool nv04_fifo_cache_pull(struct drm_device *, bool);

extern int  nv04_fifo_channel_id(struct drm_device *);

extern int  nv04_fifo_create_context(struct nouveau_channel *);

extern void nv04_fifo_destroy_context(struct nouveau_channel *);

drivers/gpu/drm/nouveau/nouveau_state.c

+10 −0
Original line number Diff line number Diff line
@@ -76,6 +76,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) 
		engine->fifo.disable		= nv04_fifo_disable;

		engine->fifo.enable		= nv04_fifo_enable;

		engine->fifo.reassign		= nv04_fifo_reassign;

		engine->fifo.cache_flush	= nv04_fifo_cache_flush;

		engine->fifo.cache_pull		= nv04_fifo_cache_pull;

		engine->fifo.channel_id		= nv04_fifo_channel_id;

		engine->fifo.create_context	= nv04_fifo_create_context;

		engine->fifo.destroy_context	= nv04_fifo_destroy_context;
@@ -115,6 +117,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) 
		engine->fifo.disable		= nv04_fifo_disable;

		engine->fifo.enable		= nv04_fifo_enable;

		engine->fifo.reassign		= nv04_fifo_reassign;

		engine->fifo.cache_flush	= nv04_fifo_cache_flush;

		engine->fifo.cache_pull		= nv04_fifo_cache_pull;

		engine->fifo.channel_id		= nv10_fifo_channel_id;

		engine->fifo.create_context	= nv10_fifo_create_context;

		engine->fifo.destroy_context	= nv10_fifo_destroy_context;
@@ -154,6 +158,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) 
		engine->fifo.disable		= nv04_fifo_disable;

		engine->fifo.enable		= nv04_fifo_enable;

		engine->fifo.reassign		= nv04_fifo_reassign;

		engine->fifo.cache_flush	= nv04_fifo_cache_flush;

		engine->fifo.cache_pull		= nv04_fifo_cache_pull;

		engine->fifo.channel_id		= nv10_fifo_channel_id;

		engine->fifo.create_context	= nv10_fifo_create_context;

		engine->fifo.destroy_context	= nv10_fifo_destroy_context;
@@ -193,6 +199,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) 
		engine->fifo.disable		= nv04_fifo_disable;

		engine->fifo.enable		= nv04_fifo_enable;

		engine->fifo.reassign		= nv04_fifo_reassign;

		engine->fifo.cache_flush	= nv04_fifo_cache_flush;

		engine->fifo.cache_pull		= nv04_fifo_cache_pull;

		engine->fifo.channel_id		= nv10_fifo_channel_id;

		engine->fifo.create_context	= nv10_fifo_create_context;

		engine->fifo.destroy_context	= nv10_fifo_destroy_context;
@@ -233,6 +241,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) 
		engine->fifo.disable		= nv04_fifo_disable;

		engine->fifo.enable		= nv04_fifo_enable;

		engine->fifo.reassign		= nv04_fifo_reassign;

		engine->fifo.cache_flush	= nv04_fifo_cache_flush;

		engine->fifo.cache_pull		= nv04_fifo_cache_pull;

		engine->fifo.channel_id		= nv10_fifo_channel_id;

		engine->fifo.create_context	= nv40_fifo_create_context;

		engine->fifo.destroy_context	= nv40_fifo_destroy_context;

drivers/gpu/drm/nouveau/nv04_fifo.c

+34 −0
Original line number Diff line number Diff line
@@ -71,6 +71,40 @@ nv04_fifo_reassign(struct drm_device *dev, bool enable) 
	return (reassign == 1);

}



bool

nv04_fifo_cache_flush(struct drm_device *dev)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;

	uint64_t start = ptimer->read(dev);



	do {

		if (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) ==

		    nv_rd32(dev, NV03_PFIFO_CACHE1_PUT))

			return true;



	} while (ptimer->read(dev) - start < 100000000);



	NV_ERROR(dev, "Timeout flushing the PFIFO cache.\n");



	return false;

}



bool

nv04_fifo_cache_pull(struct drm_device *dev, bool enable)

{

	uint32_t pull = nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0);



	if (enable) {

		nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull | 1);

	} else {

		nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull & ~1);

		nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);

	}



	return !!(pull & 1);

}



int

nv04_fifo_channel_id(struct drm_device *dev)

{