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Commit 5874743e authored by Jayachandran C's avatar Jayachandran C Committed by Ralf Baechle
Browse files

MIPS: Netlogic: Use PRID_IMP_MASK macro



Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor
type.

Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6868/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 0d57eba0
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+2 −2
Original line number Original line Diff line number Diff line
@@ -146,9 +146,9 @@ static inline int hard_smp_processor_id(void)


static inline int nlm_nodeid(void)
static inline int nlm_nodeid(void)
{
{
	uint32_t prid = read_c0_prid();
	uint32_t prid = read_c0_prid() & PRID_IMP_MASK;


	if ((prid & 0xff00) == PRID_IMP_NETLOGIC_XLP9XX)
	if (prid == PRID_IMP_NETLOGIC_XLP9XX)
		return (__read_32bit_c0_register($15, 1) >> 7) & 0x7;
		return (__read_32bit_c0_register($15, 1) >> 7) & 0x7;
	else
	else
		return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;
		return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;
+2 −2
Original line number Original line Diff line number Diff line
@@ -99,7 +99,7 @@ void *xlp_dt_init(void *fdtp);


static inline int cpu_is_xlpii(void)
static inline int cpu_is_xlpii(void)
{
{
	int chip = read_c0_prid() & 0xff00;
	int chip = read_c0_prid() & PRID_IMP_MASK;


	return chip == PRID_IMP_NETLOGIC_XLP2XX ||
	return chip == PRID_IMP_NETLOGIC_XLP2XX ||
		chip == PRID_IMP_NETLOGIC_XLP9XX;
		chip == PRID_IMP_NETLOGIC_XLP9XX;
@@ -107,7 +107,7 @@ static inline int cpu_is_xlpii(void)


static inline int cpu_is_xlp9xx(void)
static inline int cpu_is_xlp9xx(void)
{
{
	int chip = read_c0_prid() & 0xff00;
	int chip = read_c0_prid() & PRID_IMP_MASK;


	return chip == PRID_IMP_NETLOGIC_XLP9XX;
	return chip == PRID_IMP_NETLOGIC_XLP9XX;
}
}
+3 −2
Original line number Original line Diff line number Diff line
@@ -35,6 +35,7 @@


#include <asm/asm.h>
#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/asm-offsets.h>
#include <asm/cpu.h>
#include <asm/cacheops.h>
#include <asm/cacheops.h>
#include <asm/regdef.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/mipsregs.h>
@@ -92,7 +93,7 @@
 */
 */
.macro	xlp_flush_l1_dcache
.macro	xlp_flush_l1_dcache
	mfc0	t0, CP0_EBASE, 0
	mfc0	t0, CP0_EBASE, 0
	andi	t0, t0, 0xff00
	andi	t0, t0, PRID_IMP_MASK
	slt	t1, t0, 0x1200
	slt	t1, t0, 0x1200
	beqz	t1, 15f
	beqz	t1, 15f
	nop
	nop
@@ -171,7 +172,7 @@ FEXPORT(nlm_reset_entry)


1:	/* Entry point on core wakeup */
1:	/* Entry point on core wakeup */
	mfc0	t0, CP0_EBASE, 0	/* processor ID */
	mfc0	t0, CP0_EBASE, 0	/* processor ID */
	andi	t0, 0xff00
	andi	t0, PRID_IMP_MASK
	li	t1, 0x1500		/* XLP 9xx */
	li	t1, 0x1500		/* XLP 9xx */
	beq	t0, t1, 2f		/* does not need to set coherent */
	beq	t0, t1, 2f		/* does not need to set coherent */
	nop
	nop
+1 −1
Original line number Original line Diff line number Diff line
@@ -48,7 +48,7 @@ static void *xlp_fdt_blob;
void __init *xlp_dt_init(void *fdtp)
void __init *xlp_dt_init(void *fdtp)
{
{
	if (!fdtp) {
	if (!fdtp) {
		switch (current_cpu_data.processor_id & 0xff00) {
		switch (current_cpu_data.processor_id & PRID_IMP_MASK) {
#ifdef CONFIG_DT_XLP_GVP
#ifdef CONFIG_DT_XLP_GVP
		case PRID_IMP_NETLOGIC_XLP9XX:
		case PRID_IMP_NETLOGIC_XLP9XX:
			fdtp = __dtb_xlp_gvp_begin;
			fdtp = __dtb_xlp_gvp_begin;
+1 −1
Original line number Original line Diff line number Diff line
@@ -121,7 +121,7 @@ void __init plat_mem_setup(void)


const char *get_system_type(void)
const char *get_system_type(void)
{
{
	switch (read_c0_prid() & 0xff00) {
	switch (read_c0_prid() & PRID_IMP_MASK) {
	case PRID_IMP_NETLOGIC_XLP9XX:
	case PRID_IMP_NETLOGIC_XLP9XX:
	case PRID_IMP_NETLOGIC_XLP2XX:
	case PRID_IMP_NETLOGIC_XLP2XX:
		return "Broadcom XLPII Series";
		return "Broadcom XLPII Series";
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