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Commit 5864810b authored by Shinya Kuribayashi's avatar Shinya Kuribayashi Committed by Ralf Baechle
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MIPS: VR5500: Enable prefetch 



Signed-off-by: default avatarShinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent d7001198

arch/mips/mm/c-r4k.c

+1 −1
Original line number Diff line number Diff line
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void) 
		c->dcache.ways = 2;

		c->dcache.waybit = 0;



		c->options |= MIPS_CPU_CACHE_CDEX_P;

		c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;

		break;



	case CPU_TX49XX: