Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 576c25eb authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM64 update from Catalin Marinas:
 - User tagged pointers support (top 8-bit of user pointers
   automatically ignored by the CPU).
 - Kernel mode NEON (no users for arm64 yet but work in progress).
 - arm64 kernel Image header extended to accommodate future EFI stub.
 - Remove BogoMIPS reporting (not relevant, it's just the timer
   frequency).
 - Clean-up (EM_AARCH64/EM_ARM to elf-em.h, ELF notes in read-only
   segment, unused variable).
 - Bug-fixes (RAM boundaries not 2MB aligned, perf, includes).

* tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
  Documentation/arm64: clarify requirements for DTB placement
  arm64: mm: permit use of tagged pointers at EL0
  Move the EM_ARM and EM_AARCH64 definitions to uapi/linux/elf-em.h
  arm64: Remove unused cpu_name ascii in arch/arm64/mm/proc.S
  arm64: delay: don't bother reporting bogomips in /proc/cpuinfo
  arm64: Fix mapping of memory banks not ending on a PMD_SIZE boundary
  arm64: move elf notes into readonly segment
  arm64: Enable interrupts in the EL0 undef handler
  arm64: Expand arm64 image header
  ARM64: include: asm: include "asm/types.h" in "pgtable-2level-types.h" and "pgtable-3level-types.h"
  arm64: add support for kernel mode NEON
  arm64: perf: fix ARMv8 EVTYPE_MASK to include NSH bit
  arm64: perf: fix group validation when using enable_on_exec
parents 5872c840 4d5e0b15
Loading
Loading
Loading
Loading
+16 −6
Original line number Diff line number Diff line
@@ -45,9 +45,9 @@ sees fit.)

Requirement: MANDATORY

The device tree blob (dtb) must be no bigger than 2 megabytes in size
and placed at a 2-megabyte boundary within the first 512 megabytes from
the start of the kernel image. This is to allow the kernel to map the
The device tree blob (dtb) must be placed on an 8-byte boundary within
the first 512 megabytes from the start of the kernel image and must not
cross a 2-megabyte boundary. This is to allow the kernel to map the
blob using a single section mapping in the initial page tables.


@@ -68,13 +68,23 @@ Image target is available instead.

Requirement: MANDATORY

The decompressed kernel image contains a 32-byte header as follows:
The decompressed kernel image contains a 64-byte header as follows:

  u32 magic	= 0x14000008;	/* branch to stext, little-endian */
  u32 res0	= 0;		/* reserved */
  u32 code0;			/* Executable code */
  u32 code1;			/* Executable code */
  u64 text_offset;		/* Image load offset */
  u64 res0	= 0;		/* reserved */
  u64 res1	= 0;		/* reserved */
  u64 res2	= 0;		/* reserved */
  u64 res3	= 0;		/* reserved */
  u64 res4	= 0;		/* reserved */
  u32 magic	= 0x644d5241;	/* Magic number, little endian, "ARM\x64" */
  u32 res5 = 0;      		/* reserved */


Header notes:

- code0/code1 are responsible for branching to stext.

The image must be placed at the specified offset (currently 0x80000)
from the start of the system RAM and called there. The start of the
+34 −0
Original line number Diff line number Diff line
		Tagged virtual addresses in AArch64 Linux
		=========================================

Author: Will Deacon <will.deacon@arm.com>
Date  : 12 June 2013

This document briefly describes the provision of tagged virtual
addresses in the AArch64 translation system and their potential uses
in AArch64 Linux.

The kernel configures the translation tables so that translations made
via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of
the virtual address ignored by the translation hardware. This frees up
this byte for application use, with the following caveats:

	(1) The kernel requires that all user addresses passed to EL1
	    are tagged with tag 0x00. This means that any syscall
	    parameters containing user virtual addresses *must* have
	    their top byte cleared before trapping to the kernel.

	(2) Tags are not guaranteed to be preserved when delivering
	    signals. This means that signal handlers in applications
	    making use of tags cannot rely on the tag information for
	    user virtual addresses being maintained for fields inside
	    siginfo_t. One exception to this rule is for signals raised
	    in response to debug exceptions, where the tag information
	    will be preserved.

	(3) Special care should be taken when using tagged pointers,
	    since it is likely that C compilers will not hazard two
	    addresses differing only in the upper bits.

The architecture prevents the use of a tagged PC, so the upper byte will
be set to a sign-extension of bit 55 on exception return.
+0 −2
Original line number Diff line number Diff line
@@ -19,8 +19,6 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];

typedef struct user_fp elf_fpregset_t;

#define EM_ARM	40

#define EF_ARM_EABI_MASK	0xff000000
#define EF_ARM_EABI_UNKNOWN	0x00000000
#define EF_ARM_EABI_VER1	0x01000000
+3 −0
Original line number Diff line number Diff line
@@ -96,6 +96,9 @@ config SWIOTLB
config IOMMU_HELPER
	def_bool SWIOTLB

config KERNEL_MODE_NEON
	def_bool y

source "init/Kconfig"

source "kernel/Kconfig.freezer"
+0 −3
Original line number Diff line number Diff line
@@ -33,8 +33,6 @@ typedef unsigned long elf_greg_t;
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
typedef struct user_fpsimd_state elf_fpregset_t;

#define EM_AARCH64		183

/*
 * AArch64 static relocation types.
 */
@@ -151,7 +149,6 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
#define arch_randomize_brk arch_randomize_brk

#ifdef CONFIG_COMPAT
#define EM_ARM				40
#define COMPAT_ELF_PLATFORM		("v8l")

#define COMPAT_ELF_ET_DYN_BASE		(randomize_et_dyn(2 * TASK_SIZE_32 / 3))
Loading