Merge "mmc: sdhci-msm: get lower bus speed mode for clock scaling" (56f34a46) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/mmc/sdhci-msm.txt

+6 −0

Original line number	Diff line number	Diff line
		@@ -68,6 +68,10 @@ Optional Properties:
		command-queueing mode or legacy respectively.
		- qcom,core_3_0v_support: an optional property that is used to fake
		3.0V support for SDIO devices.
		- qcom,scaling-lower-bus-speed-mode: specifies the lower bus speed mode to be used
		during clock scaling. If this property is not
		defined, then it falls back to the default HS
		bus speed mode to maintain backward compatibility.

		In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltage).
		- qcom,<supply>-always-on - specifies whether supply should be kept "on" always.
		@@ -138,6 +142,8 @@ Example:
		qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
		qcom,ice-clk-rates = <300000000>;

		qcom,scaling-lower-bus-speed-mode = "DDR52";

		gpios = <&msmgpio 40 0>, /* CLK */
		<&msmgpio 39 0>, /* CMD */
		<&msmgpio 38 0>, /* DATA0 */

+30 −2

Original line number	Diff line number	Diff line
		@@ -1413,6 +1413,24 @@ out:
		return ret;
		}

		static int mmc_select_hs_ddr52(struct mmc_host *host)
		{
		int err;

		mmc_select_hs(host->card);
		mmc_set_clock(host, MMC_HIGH_52_MAX_DTR);
		err = mmc_select_bus_width(host->card);
		if (err < 0) {
		pr_err("%s: %s: select_bus_width failed(%d)\n",
		mmc_hostname(host), __func__, err);
		return err;
		}

		err = mmc_select_hs_ddr(host->card);

		return err;
		}

		/*
		* Scale down from HS400 to HS in order to allow frequency change.
		* This is needed for cards that doesn't support changing frequency in HS400
		@@ -1424,9 +1442,19 @@ static int mmc_scale_low(struct mmc_host *host, unsigned long freq)
		mmc_set_timing(host, MMC_TIMING_LEGACY);
		mmc_set_clock(host, MMC_HIGH_26_MAX_DTR);

		if (host->clk_scaling.lower_bus_speed_mode &
		MMC_SCALING_LOWER_DDR52_MODE) {
		err = mmc_select_hs_ddr52(host);
		if (err)
		pr_err("%s: %s: failed to switch to DDR52: err: %d\n",
		mmc_hostname(host), __func__, err);
		else
		return err;
		}

		err = mmc_select_hs(host->card);
		if (err) {
		pr_err("%s: %s: selecting HS (52Mhz) failed (%d)\n",
		pr_err("%s: %s: scaling low: failed (%d)\n",
		mmc_hostname(host), __func__, err);
		return err;
		}

+14 −0

Original line number	Diff line number	Diff line
		@@ -1622,6 +1622,7 @@ struct sdhci_msm_pltfm_data sdhci_msm_populate_pdata(struct device dev,
		int ice_clk_table_len;
		u32 *ice_clk_table = NULL;
		enum of_gpio_flags flags = OF_GPIO_ACTIVE_LOW;
		const char *lower_bus_speed = NULL;

		pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
		if (!pdata) {
		@@ -1652,6 +1653,19 @@ struct sdhci_msm_pltfm_data sdhci_msm_populate_pdata(struct device dev,
		!msm_host->mmc->clk_scaling.freq_table_sz)
		dev_err(dev, "bad dts clock scaling frequencies\n");

		/*
		* Few hosts can support DDR52 mode at the same lower
		* system voltage corner as high-speed mode. In such cases,
		* it is always better to put it in DDR mode which will
		* improve the performance without any power impact.
		*/
		if (!of_property_read_string(np, "qcom,scaling-lower-bus-speed-mode",
		&lower_bus_speed)) {
		if (!strcmp(lower_bus_speed, "DDR52"))
		msm_host->mmc->clk_scaling.lower_bus_speed_mode \|=
		MMC_SCALING_LOWER_DDR52_MODE;
		}

		if (sdhci_msm_dt_get_array(dev, "qcom,clk-rates",
		&clk_table, &clk_table_len, 0)) {
		dev_err(dev, "failed parsing supported clock rates\n");

+2 −0

Original line number	Diff line number	Diff line
		@@ -332,6 +332,8 @@ struct mmc_devfeq_clk_scaling {
		unsigned long polling_delay_ms;
		unsigned int upthreshold;
		unsigned int downthreshold;
		unsigned int lower_bus_speed_mode;
		#define MMC_SCALING_LOWER_DDR52_MODE 1
		bool need_freq_change;
		bool clk_scaling_in_progress;
		bool is_busy_started;