Loading arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +43 −0 Original line number Diff line number Diff line Loading @@ -1283,6 +1283,49 @@ }; }; wcd9xxx_intr { wcd_intr_default: wcd_intr_default{ mux { pins = "gpio54"; function = "gpio"; }; config { pins = "gpio54"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ input-enable; }; }; }; cdc_reset_ctrl { cdc_reset_sleep: cdc_reset_sleep { mux { pins = "gpio64"; function = "gpio"; }; config { pins = "gpio64"; drive-strength = <16>; bias-disable; output-low; }; }; cdc_reset_active:cdc_reset_active { mux { pins = "gpio64"; function = "gpio"; }; config { pins = "gpio64"; drive-strength = <16>; bias-pull-down; output-high; }; }; }; pri_aux_pcm { pri_aux_pcm_sleep: pri_aux_pcm_sleep { mux { Loading arch/arm/boot/dts/qcom/msm8996.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -821,6 +821,8 @@ #interrupt-cells = <1>; interrupt-parent = <&tlmm>; qcom,gpio-connect = <&tlmm 54 0>; pinctrl-names = "default"; pinctrl-0 = <&wcd_intr_default>; }; clock_audio: audio_ext_clk { Loading Loading @@ -911,6 +913,9 @@ 30>; qcom,cdc-reset-gpio = <&tlmm 64 0>; pinctrl-names = "default", "idle"; pinctrl-0 = <&cdc_reset_active>; pinctrl-1 = <&cdc_reset_sleep>; clock-names = "wcd_clk", "wcd_native_clk"; clocks = <&clock_audio clk_audio_pmi_clk>, Loading Loading
arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +43 −0 Original line number Diff line number Diff line Loading @@ -1283,6 +1283,49 @@ }; }; wcd9xxx_intr { wcd_intr_default: wcd_intr_default{ mux { pins = "gpio54"; function = "gpio"; }; config { pins = "gpio54"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ input-enable; }; }; }; cdc_reset_ctrl { cdc_reset_sleep: cdc_reset_sleep { mux { pins = "gpio64"; function = "gpio"; }; config { pins = "gpio64"; drive-strength = <16>; bias-disable; output-low; }; }; cdc_reset_active:cdc_reset_active { mux { pins = "gpio64"; function = "gpio"; }; config { pins = "gpio64"; drive-strength = <16>; bias-pull-down; output-high; }; }; }; pri_aux_pcm { pri_aux_pcm_sleep: pri_aux_pcm_sleep { mux { Loading
arch/arm/boot/dts/qcom/msm8996.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -821,6 +821,8 @@ #interrupt-cells = <1>; interrupt-parent = <&tlmm>; qcom,gpio-connect = <&tlmm 54 0>; pinctrl-names = "default"; pinctrl-0 = <&wcd_intr_default>; }; clock_audio: audio_ext_clk { Loading Loading @@ -911,6 +913,9 @@ 30>; qcom,cdc-reset-gpio = <&tlmm 64 0>; pinctrl-names = "default", "idle"; pinctrl-0 = <&cdc_reset_active>; pinctrl-1 = <&cdc_reset_sleep>; clock-names = "wcd_clk", "wcd_native_clk"; clocks = <&clock_audio clk_audio_pmi_clk>, Loading