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Commit 561bac78 authored by Neil Leeder's avatar Neil Leeder Committed by Matt Wagantall
Browse files

Perf: arm64: add perf user-mode permissions 



Allow user-mode applications to use the performance
counters for debugging and performance analysis.

Change-Id: I3985c0fccfe925c50ace5d33435f6f69b31e07a5
Signed-off-by: default avatarNeil Leeder <nleeder@codeaurora.org>
parent d7465710

arch/arm64/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -455,6 +455,16 @@ config HW_PERF_EVENTS 
	  Enable hardware performance counter support for perf events. If

	  disabled, perf events will use software events only.



config PERF_EVENTS_USERMODE

	bool "Enable usermode access for perf events"

	depends on PERF_EVENTS

	help

	  Enable user-mode access to performance counters for perf events.

	  If enabled, the access permissions allowing CPU performance

	  counters to be accessed from user-mode are set.



	  If you want user-mode programs to access perf events, say Y



config SYS_SUPPORTS_HUGETLBFS

	def_bool y

arch/arm64/kernel/perf_debug.c

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
static char *descriptions =

	" 0 arm64: perf: add debug patch logging framework\n"

	" 1 Perf: arm64: Add L1 counters to tracepoints\n"

	" 5 Perf: arm64: add perf user-mode permissions\n"

;



static ssize_t desc_read(struct file *fp, char __user *buf,

arch/arm64/kernel/perf_event.c

+17 −2
Original line number Diff line number Diff line
@@ -1244,6 +1244,22 @@ static int armv8pmu_set_event_filter(struct hw_perf_event *event, 
	return 0;

}



#ifdef CONFIG_PERF_EVENTS_USERMODE

static void armv8pmu_init_usermode(void)

{

	/* Enable access from userspace. */

	asm volatile("msr pmuserenr_el0, %0" :: "r" (0xF));



}

#else

static inline void armv8pmu_init_usermode(void)

{

	/* Disable access from userspace. */

	asm volatile("msr pmuserenr_el0, %0" :: "r" (0));



}

#endif



static void armv8pmu_reset(void *info)

{

	u32 idx, nb_cnt = cpu_pmu->num_events;
@@ -1255,8 +1271,7 @@ static void armv8pmu_reset(void *info) 
	/* Initialize & Reset PMNC: C and P bits. */

	armv8pmu_pmcr_write(ARMV8_PMCR_P | ARMV8_PMCR_C);



	/* Disable access from userspace. */

	asm volatile("msr pmuserenr_el0, %0" :: "r" (0));

	armv8pmu_init_usermode();

}



static int armv8_pmuv3_map_event(struct perf_event *event)