Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 55fe242a authored by Mayank Rana's avatar Mayank Rana
Browse files

ARM: dts: msm: Update QUSB PHY VDD's min value to allow SVS on MSM8996



Currently QUSB PHY VDD is using nominal voltage when USB is used
in device and host mode. This change starts using SVS voltage with
QUSB PHY VDD voltage supply to allow SVS when USB is cable
connected (both in host and device mode) on MSM8996.

CRs-Fixed: 975648
Change-Id: I277e18bcf79f3cd0173e966cf22bd62cd4db3d04
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent e7ef35b8
Loading
Loading
Loading
Loading
+4 −2
Original line number Diff line number Diff line
@@ -39,8 +39,10 @@ Required properties :
         "hsusb_vdd_dig" (when voting for VDDCX Corner voltage),
         "HSUSB_1p8-supply" and "HSUSB_3p3-supply".
- qcom,vdd-voltage-level: This property must be a list of three integer
	values (no, min, max) where each value represents either a voltage
	in microvolts or a value corresponding to voltage corner.
	values (none, min, max) where each value represents either a voltage
	in microvolts or a value corresponding to voltage corner. If usb core
	supports svs, min value will have absolute SVS or SVS corner otherwise
	min value will have absolute nominal or nominal corner.
- clocks: a list of phandles to the USB clocks. Usage is as per
	Documentation/devicetree/bindings/clock/clock-bindings.txt
- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
+2 −2
Original line number Diff line number Diff line
@@ -2036,7 +2036,7 @@
		vdd-supply = <&pm8994_s2_corner>;
		vdda18-supply = <&pm8994_l12>;
		vdda33-supply = <&pm8994_l24>;
		qcom,vdd-voltage-level = <1 5 7>;
		qcom,vdd-voltage-level = <1 4 7>;
		qcom,tune2-efuse-bit-pos = <21>;
		qcom,tune2-efuse-num-bits = <4>;
		qcom,enable-dpdm-pulsing;
@@ -2072,7 +2072,7 @@
		vdd-supply = <&pm8994_s2_corner>;
		vdda18-supply = <&pm8994_l12>;
		vdda33-supply = <&pm8994_l24>;
		qcom,vdd-voltage-level = <1 5 7>;
		qcom,vdd-voltage-level = <1 4 7>;
		qcom,tune2-efuse-bit-pos = <25>;
		qcom,tune2-efuse-num-bits = <4>;
		qcom,qusb-phy-init-seq = <0xF8 0x80