Commit 55fde31c authored Apr 29, 2014 by Joel Fernandes Committed by Tony Lindgren May 05, 2014

ARM: OMAP5: Redo THUMB mode switch on secondary CPU

Here's a redo of the patch [1] that effectively does the same
thing but is the right way to do things by using ENDPROC instead.
The firmware correctly switches to THUMB before entry.

The patch applies ontop of the earlier patch [1].

[1] https://lkml.org/lkml/2014/4/22/1044



Suggested-by: Dave Martin <Dave.Martin@arm.com>
Cc: Dave Martin <Dave.Martin@arm.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nishanth Menon <nm@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

parent 4c051603

arch/arm/mach-omap2/omap-headsmp.S

+1 −5

Original line number	Diff line number	Diff line
		@@ -31,10 +31,6 @@
		* register AuxCoreBoot0.
		*/
		ENTRY(omap5_secondary_startup)
		.arm
		THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode.
		THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
		THUMB( .thumb ) @ switch to Thumb now.
		wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
		ldr r0, [r2]
		mov r0, r0, lsr #5
		@@ -43,7 +39,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
		cmp r0, r4
		bne wait
		b secondary_startup
		END(omap5_secondary_startup)
		ENDPROC(omap5_secondary_startup)
		/*
		* OMAP4 specific entry point for secondary CPU to jump from ROM
		* code. This routine also provides a holding flag into which