Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 55bdd694 authored by Catalin Marinas's avatar Catalin Marinas Committed by Uwe Kleine-König
Browse files

ARM: Add base support for ARMv7-M 



This patch adds the base support for the ARMv7-M
architecture. It consists of the corresponding arch/arm/mm/ files and
various #ifdef's around the kernel. Exception handling is implemented by
a subsequent patch.

[ukleinek: squash in some changes originating from commit

b5717ba (Cortex-M3: Add support for the Microcontroller Prototyping System)

from the v2.6.33-arm1 patch stack, port to post 3.6, drop zImage
support, drop reorganisation of pt_regs, assert CONFIG_CPU_V7M doesn't
leak into installed headers and a few cosmetic changes]

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarJonathan Austin <jonathan.austin@arm.com>
Tested-by: default avatarJonathan Austin <jonathan.austin@arm.com>
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
parent 73a09d21

arch/arm/include/asm/assembler.h

+16 −1
Original line number Diff line number Diff line
@@ -136,7 +136,11 @@ 
 * assumes FIQs are enabled, and that the processor is in SVC mode.

 */

	.macro	save_and_disable_irqs, oldcpsr

#ifdef CONFIG_CPU_V7M

	mrs	\oldcpsr, primask

#else

	mrs	\oldcpsr, cpsr

#endif

	disable_irq

	.endm
@@ -150,7 +154,11 @@ 
 * guarantee that this will preserve the flags.

 */

	.macro	restore_irqs_notrace, oldcpsr

#ifdef CONFIG_CPU_V7M

	msr	primask, \oldcpsr

#else

	msr	cpsr_c, \oldcpsr

#endif

	.endm



	.macro restore_irqs, oldcpsr
@@ -229,7 +237,14 @@ 
#endif

	.endm



#ifdef CONFIG_THUMB2_KERNEL

#if defined(CONFIG_CPU_V7M)

	/*

	 * setmode is used to assert to be in svc mode during boot. For v7-M

	 * this is done in __v7m_setup, so setmode can be empty here.

	 */

	.macro	setmode, mode, reg

	.endm

#elif defined(CONFIG_THUMB2_KERNEL)

	.macro	setmode, mode, reg

	mov	\reg, #\mode

	msr	cpsr_c, \reg

arch/arm/include/asm/cputype.h

+11 −1
Original line number Diff line number Diff line
@@ -106,7 +106,17 @@ static inline unsigned int __attribute_const__ read_cpuid_id(void) 
	return read_cpuid(CPUID_ID);

}



#else /* ifdef CONFIG_CPU_CP15 */

#elif defined(CONFIG_CPU_V7M)



#include <asm/io.h>

#include <asm/v7m.h>



static inline unsigned int __attribute_const__ read_cpuid_id(void)

{

	return readl(BASEADDR_V7M_SCB + V7M_SCB_CPUID);

}



#else /* ifdef CONFIG_CPU_CP15 / elif defined(CONFIG_CPU_V7M) */



static inline unsigned int __attribute_const__ read_cpuid_id(void)

{

arch/arm/include/asm/glue-cache.h

+27 −0
Original line number Diff line number Diff line
@@ -125,10 +125,37 @@ 
# endif

#endif



#if defined(CONFIG_CPU_V7M)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE nop

# endif

#endif



#if !defined(_CACHE) && !defined(MULTI_CACHE)

#error Unknown cache maintenance model

#endif



#ifndef __ASSEMBLER__

extern inline void nop_flush_icache_all(void) { }

extern inline void nop_flush_kern_cache_all(void) { }

extern inline void nop_flush_kern_cache_louis(void) { }

extern inline void nop_flush_user_cache_all(void) { }

extern inline void nop_flush_user_cache_range(unsigned long a,

		unsigned long b, unsigned int c) { }



extern inline void nop_coherent_kern_range(unsigned long a, unsigned long b) { }

extern inline int nop_coherent_user_range(unsigned long a,

		unsigned long b) { return 0; }

extern inline void nop_flush_kern_dcache_area(void *a, size_t s) { }



extern inline void nop_dma_flush_range(const void *a, const void *b) { }



extern inline void nop_dma_map_area(const void *s, size_t l, int f) { }

extern inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }

#endif



#ifndef MULTI_CACHE

#define __cpuc_flush_icache_all		__glue(_CACHE,_flush_icache_all)

#define __cpuc_flush_kern_all		__glue(_CACHE,_flush_kern_cache_all)

arch/arm/include/asm/glue-df.h

+8 −0
Original line number Diff line number Diff line
@@ -95,6 +95,14 @@ 
# endif

#endif



#ifdef CONFIG_CPU_ABRT_NOMMU

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER nommu_early_abort

# endif

#endif



#ifndef CPU_DABORT_HANDLER

#error Unknown data abort handler type

#endif

arch/arm/include/asm/glue-proc.h

+9 −0
Original line number Diff line number Diff line
@@ -230,6 +230,15 @@ 
# endif

#endif



#ifdef CONFIG_CPU_V7M

# ifdef CPU_NAME

#  undef  MULTI_CPU

#  define MULTI_CPU

# else

#  define CPU_NAME cpu_v7m

# endif

#endif



#ifndef MULTI_CPU

#define cpu_proc_init			__glue(CPU_NAME,_proc_init)

#define cpu_proc_fin			__glue(CPU_NAME,_proc_fin)