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Commit 5596a9db authored by Christian König's avatar Christian König Committed by Dave Airlie
Browse files

drm/radeon: make ring rptr and wptr register offsets variable 



Every ring seems to have the concept of read and
write pointers. Make the register offset variable
so we can use the functions for different types of rings.

Signed-off-by: default avatarChristian König <deathsimple@vodafone.de>
Reviewed-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 7b1f2485

drivers/gpu/drm/radeon/evergreen.c

+2 −1
Original line number Diff line number Diff line
@@ -3120,7 +3120,8 @@ static int evergreen_startup(struct radeon_device *rdev) 
	}

	evergreen_irq_set(rdev);



	r = radeon_ring_init(rdev, cp, cp->ring_size);

	r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,

			     R600_CP_RB_RPTR, R600_CP_RB_WPTR);

	if (r)

		return r;

	r = evergreen_cp_load_microcode(rdev);

drivers/gpu/drm/radeon/ni.c

+3 −2
Original line number Diff line number Diff line
@@ -1273,7 +1273,7 @@ bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_cp *cp) 
		radeon_ring_unlock_commit(rdev, cp);

	}

	/* XXX deal with CP0,1,2 */

	cp->rptr = RREG32(CP_RB0_RPTR);

	cp->rptr = RREG32(cp->rptr_reg);

	return r100_gpu_cp_is_lockup(rdev, lockup, cp);

}
@@ -1393,7 +1393,8 @@ static int cayman_startup(struct radeon_device *rdev) 
	}

	evergreen_irq_set(rdev);



	r = radeon_ring_init(rdev, cp, cp->ring_size);

	r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,

			     CP_RB0_RPTR, CP_RB0_WPTR);

	if (r)

		return r;

	r = cayman_cp_load_microcode(rdev);

drivers/gpu/drm/radeon/r100.c

+3 −9
Original line number Diff line number Diff line
@@ -1074,7 +1074,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) 
	rb_bufsz = drm_order(ring_size / 8);

	ring_size = (1 << (rb_bufsz + 1)) * 4;

	r100_cp_load_microcode(rdev);

	r = radeon_ring_init(rdev, cp, ring_size);

	r = radeon_ring_init(rdev, cp, ring_size, RADEON_WB_CP_RPTR_OFFSET,

			     RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR);

	if (r) {

		return r;

	}
@@ -1179,13 +1180,6 @@ void r100_cp_disable(struct radeon_device *rdev) 
	}

}



void r100_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp)

{

	WREG32(RADEON_CP_RB_WPTR, cp->wptr);

	(void)RREG32(RADEON_CP_RB_WPTR);

}





/*

 * CS functions

 */
@@ -2184,7 +2178,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_cp *cp) 
		radeon_ring_write(cp, 0x80000000);

		radeon_ring_unlock_commit(rdev, cp);

	}

	cp->rptr = RREG32(RADEON_CP_RB_RPTR);

	cp->rptr = RREG32(cp->rptr_reg);

	return r100_gpu_cp_is_lockup(rdev, &rdev->config.r100.lockup, cp);

}

drivers/gpu/drm/radeon/r600.c

+4 −8
Original line number Diff line number Diff line
@@ -1372,7 +1372,7 @@ bool r600_gpu_is_lockup(struct radeon_device *rdev, struct radeon_cp *cp) 
		radeon_ring_write(cp, 0x80000000);

		radeon_ring_unlock_commit(rdev, cp);

	}

	cp->rptr = RREG32(R600_CP_RB_RPTR);

	cp->rptr = RREG32(cp->rptr_reg);

	return r100_gpu_cp_is_lockup(rdev, lockup, cp);

}
@@ -2234,12 +2234,6 @@ int r600_cp_resume(struct radeon_device *rdev) 
	return 0;

}



void r600_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp)

{

	WREG32(CP_RB_WPTR, cp->wptr);

	(void)RREG32(CP_RB_WPTR);

}



void r600_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size)

{

	u32 rb_bufsz;
@@ -2474,7 +2468,9 @@ int r600_startup(struct radeon_device *rdev) 
	}

	r600_irq_set(rdev);



	r = radeon_ring_init(rdev, cp, cp->ring_size);

	r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,

			     R600_CP_RB_RPTR, R600_CP_RB_WPTR);



	if (r)

		return r;

	r = r600_cp_load_microcode(rdev);

drivers/gpu/drm/radeon/radeon.h

+5 −3
Original line number Diff line number Diff line
@@ -525,8 +525,11 @@ struct radeon_cp { 
	struct radeon_bo	*ring_obj;

	volatile uint32_t	*ring;

	unsigned		rptr;

	unsigned		rptr_offs;

	unsigned		rptr_reg;

	unsigned		wptr;

	unsigned		wptr_old;

	unsigned		wptr_reg;

	unsigned		ring_size;

	unsigned		ring_free_dw;

	int			count_dw;
@@ -602,7 +605,8 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_cp *cp); 
void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_cp *cp);

void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_cp *cp);

int radeon_ring_test(struct radeon_device *rdev, struct radeon_cp *cp);

int radeon_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size);

int radeon_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size,

		     unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg);

void radeon_ring_fini(struct radeon_device *rdev, struct radeon_cp *cp);
@@ -939,7 +943,6 @@ struct radeon_asic { 
	int (*cp_init)(struct radeon_device *rdev, unsigned ring_size);

	void (*cp_fini)(struct radeon_device *rdev);

	void (*cp_disable)(struct radeon_device *rdev);

	void (*cp_commit)(struct radeon_device *rdev, struct radeon_cp *cp);

	void (*ring_start)(struct radeon_device *rdev);

	int (*ring_test)(struct radeon_device *rdev, struct radeon_cp *cp);

	void (*ring_ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1491,7 +1494,6 @@ void radeon_ring_write(struct radeon_cp *cp, uint32_t v); 
#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))

#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev))

#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart_set_page((rdev), (i), (p))

#define radeon_cp_commit(rdev, cp) (rdev)->asic->cp_commit((rdev), (cp))

#define radeon_ring_start(rdev) (rdev)->asic->ring_start((rdev))

#define radeon_ring_test(rdev, cp) (rdev)->asic->ring_test((rdev), (cp))

#define radeon_ring_ib_execute(rdev, ib) (rdev)->asic->ring_ib_execute((rdev), (ib))