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Commit 557b7d5d authored by Johan Hovold's avatar Johan Hovold Committed by Nicolas Ferre
Browse files

ARM: at91/avr32/atmel_lcdfb: add bus-clock entry



Add hclk entry for the atmel_lcdfb bus clock.

On at91sam9261, at91sam9g10 and at32ap the bus clock has to be enabled
as well as the peripheral clock. Add the appropriate lookup entries to
these SOCs and fake clocks to the SOCs that do not use it.

This allows us to get rid of the conditional enabling of the clocks in
the driver which relied on the cpu_is macros.

Tested on at91sam9263 and at91sam9g45, compile-tested for other
AT91-SOCs, and untested for AVR32.

Signed-off-by: default avatarJohan Hovold <jhovold@gmail.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 67cf9c0a
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+1 −0
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@@ -169,6 +169,7 @@ static struct clk *periph_clocks[] __initdata = {
};

static struct clk_lookup periph_clocks_lookups[] = {
	CLKDEV_CON_DEV_ID("hclk", "atmel_lcdfb.0", &hck1),
	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+1 −0
Original line number Diff line number Diff line
@@ -190,6 +190,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
	CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
	CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
	CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
	CLKDEV_CON_DEV_ID("hclk", "atmel_lcdfb.0", &lcdc_clk),
	CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
	CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
+1 −0
Original line number Diff line number Diff line
@@ -228,6 +228,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
	CLKDEV_CON_ID("hclk", &macb_clk),
	/* One additional fake clock for ohci */
	CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
	CLKDEV_CON_DEV_ID("hclk", "atmel_lcdfb.0", &lcdc_clk),
	CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
	CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
	CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
+1 −0
Original line number Diff line number Diff line
@@ -179,6 +179,7 @@ static struct clk *periph_clocks[] __initdata = {
};

static struct clk_lookup periph_clocks_lookups[] = {
	CLKDEV_CON_DEV_ID("hclk", "atmel_lcdfb.0", &lcdc_clk),
	CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
	CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
+2 −2
Original line number Diff line number Diff line
@@ -1453,7 +1453,7 @@ static struct resource atmel_lcdfb0_resource[] = {
	},
};
DEFINE_DEV_DATA(atmel_lcdfb, 0);
DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
DEV_CLK(hclk, atmel_lcdfb0, hsb, 7);
static struct clk atmel_lcdfb0_pixclk = {
	.name		= "lcdc_clk",
	.dev		= &atmel_lcdfb0_device.dev,
@@ -2246,7 +2246,7 @@ static __initdata struct clk *init_clocks[] = {
	&atmel_twi0_pclk,
	&atmel_mci0_pclk,
#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
	&atmel_lcdfb0_hck1,
	&atmel_lcdfb0_hclk,
	&atmel_lcdfb0_pixclk,
#endif
	&ssc0_pclk,
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