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Commit 55148f6f authored by Greg Ungerer's avatar Greg Ungerer
Browse files

m68knommu: merge common ColdFire UART IRQ setup 



Some ColdFire CPU UART hardware modules can configure the IRQ they use.
Currently the same setup code is duplicated in the init code for each of
these ColdFire CPUs. Merge all this code to a single instance.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 0d2fe946

arch/m68k/include/asm/mcfuart.h

+4 −1
Original line number Diff line number Diff line
@@ -41,7 +41,10 @@ struct mcf_platform_uart { 
#define	MCFUART_UTF		0x28		/* Transmitter FIFO (r/w) */

#define	MCFUART_URF		0x2c		/* Receiver FIFO (r/w) */

#define	MCFUART_UFPD		0x30		/* Frac Prec. Divider (r/w) */

#else

#endif

#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \

        defined(CONFIG_M5249) || defined(CONFIG_M5307) || \

        defined(CONFIG_M5407)

#define	MCFUART_UIVR		0x30		/* Interrupt Vector (r/w) */

#endif

#define	MCFUART_UIPR		0x34		/* Input Port (r) */

arch/m68k/platform/5206/config.c

+0 −17
Original line number Diff line number Diff line
@@ -16,22 +16,6 @@ 
#include <asm/machdep.h>

#include <asm/coldfire.h>

#include <asm/mcfsim.h>

#include <asm/mcfuart.h>



/***************************************************************************/



static void __init m5206_uarts_init(void)

{

	/* UART0 interrupt setup */

	writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

	writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);



	/* UART1 interrupt setup */

	writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

	writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);

}



/***************************************************************************/
@@ -74,7 +58,6 @@ void __init config_BSP(char *commandp, int size) 
	mach_reset = m5206_cpu_reset;

	mach_sched_init = hw_timer_init;

	m5206_timers_init();

	m5206_uarts_init();



	/* Only support the external interrupts on their primary level */

	mcf_mapirq2imr(25, MCFINTC_EINT1);

arch/m68k/platform/5249/config.c

+0 −17
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ 
#include <asm/machdep.h>

#include <asm/coldfire.h>

#include <asm/mcfsim.h>

#include <asm/mcfuart.h>

#include <asm/mcfqspi.h>



/***************************************************************************/
@@ -215,21 +214,6 @@ static struct platform_device *m5249_devices[] __initdata = { 


/***************************************************************************/



static void __init m5249_uarts_init(void)

{

	/* UART0 interrupt setup */

	writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

	writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);



	/* UART1 interrupt setup */

	writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

	writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);

}



/***************************************************************************/



#ifdef CONFIG_M5249C3



static void __init m5249_smc91x_init(void)
@@ -281,7 +265,6 @@ void __init config_BSP(char *commandp, int size) 
	mach_reset = m5249_cpu_reset;

	mach_sched_init = hw_timer_init;

	m5249_timers_init();

	m5249_uarts_init();

#ifdef CONFIG_M5249C3

	m5249_smc91x_init();

#endif

arch/m68k/platform/5307/config.c

+0 −17
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ 
#include <asm/machdep.h>

#include <asm/coldfire.h>

#include <asm/mcfsim.h>

#include <asm/mcfuart.h>

#include <asm/mcfwdebug.h>



/***************************************************************************/
@@ -29,21 +28,6 @@ unsigned char ledbank = 0xff; 


/***************************************************************************/



static void __init m5307_uarts_init(void)

{

	/* UART0 interrupt setup */

	writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

	writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);



	/* UART1 interrupt setup */

	writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

	writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);

}



/***************************************************************************/



static void __init m5307_timers_init(void)

{

	/* Timer1 is always used as system timer */
@@ -84,7 +68,6 @@ void __init config_BSP(char *commandp, int size) 
	mach_reset = m5307_cpu_reset;

	mach_sched_init = hw_timer_init;

	m5307_timers_init();

	m5307_uarts_init();



	/* Only support the external interrupts on their primary level */

	mcf_mapirq2imr(25, MCFINTC_EINT1);

arch/m68k/platform/5407/config.c

+0 −17
Original line number Diff line number Diff line
@@ -16,22 +16,6 @@ 
#include <asm/machdep.h>

#include <asm/coldfire.h>

#include <asm/mcfsim.h>

#include <asm/mcfuart.h>



/***************************************************************************/



static void __init m5407_uarts_init(void)

{

	/* UART0 interrupt setup */

	writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);

	writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);



	/* UART1 interrupt setup */

	writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);

	writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR);

	mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);

}



/***************************************************************************/
@@ -68,7 +52,6 @@ void __init config_BSP(char *commandp, int size) 
	mach_reset = m5407_cpu_reset;

	mach_sched_init = hw_timer_init;

	m5407_timers_init();

	m5407_uarts_init();



	/* Only support the external interrupts on their primary level */

	mcf_mapirq2imr(25, MCFINTC_EINT1);