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Commit 54d69df5 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'late/kirkwood' into late/soc



Merge in the late Kirkwood branch with the OMAP late branch for upstream
submission.

Final contents described in shared tag.

Fixup remove/change conflicts in arch/arm/mach-omap2/devices.c and
drivers/spi/spi-omap2-mcspi.c.

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents ad932bb6 46f2007c
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ARM Marvell SoCs
================

This document lists all the ARM Marvell SoCs that are currently
supported in mainline by the Linux kernel. As the Marvell families of
SoCs are large and complex, it is hard to understand where the support
for a particular SoC is available in the Linux kernel. This document
tries to help in understanding where those SoCs are supported, and to
match them with their corresponding public datasheet, when available.

Orion family
------------

  Flavors:
        88F5082
        88F5181
        88F5181L
        88F5182
               Datasheet               : http://www.embeddedarm.com/documentation/third-party/MV88F5182-datasheet.pdf
               Programmer's User Guide : http://www.embeddedarm.com/documentation/third-party/MV88F5182-opensource-manual.pdf
               User Manual             : http://www.embeddedarm.com/documentation/third-party/MV88F5182-usermanual.pdf
        88F5281
               Datasheet               : http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sheet.pdf
        88F6183
  Core: Feroceon ARMv5 compatible
  Linux kernel mach directory: arch/arm/mach-orion5x
  Linux kernel plat directory: arch/arm/plat-orion

Kirkwood family
---------------

  Flavors:
        88F6282 a.k.a Armada 300
                Product Brief  : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf
        88F6283 a.k.a Armada 310
                Product Brief  : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf
        88F6190
                Product Brief  : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6190-003_WEB.pdf
                Hardware Spec  : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
                Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
        88F6192
                Product Brief  : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6192-003_ver1.pdf
                Hardware Spec  : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
                Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
        88F6182
        88F6180
                Product Brief  : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6180-003_ver1.pdf
                Hardware Spec  : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
                Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
        88F6281
                Product Brief  : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6281-004_ver1.pdf
                Hardware Spec  : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
                Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
  Homepage: http://www.marvell.com/embedded-processors/kirkwood/
  Core: Feroceon ARMv5 compatible
  Linux kernel mach directory: arch/arm/mach-kirkwood
  Linux kernel plat directory: arch/arm/plat-orion

Discovery family
----------------

  Flavors:
        MV78100
                Product Brief  : http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78100-003_WEB.pdf
                Hardware Spec  : http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78100_OpenSource.pdf
                Functional Spec: http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf
        MV78200
                Product Brief  : http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78200-002_WEB.pdf
                Hardware Spec  : http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78200_OpenSource.pdf
                Functional Spec: http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf
        MV76100
                Not supported by the Linux kernel.

  Core: Feroceon ARMv5 compatible

  Linux kernel mach directory: arch/arm/mach-mv78xx0
  Linux kernel plat directory: arch/arm/plat-orion

EBU Armada family
-----------------

  Armada 370 Flavors:
        88F6710
        88F6707
        88F6W11

  Armada XP Flavors:
        MV78230
        MV78260
        MV78460

  Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
  No public datasheet available.

  Core: Sheeva ARMv7 compatible

  Linux kernel mach directory: arch/arm/mach-mvebu
  Linux kernel plat directory: none

Avanta family
-------------

  Flavors:
       88F6510
       88F6530P
       88F6550
       88F6560
  Homepage     : http://www.marvell.com/broadband/
  Product Brief: http://www.marvell.com/broadband/assets/Marvell_Avanta_88F6510_305_060-001_product_brief.pdf
  No public datasheet available.

  Core: ARMv5 compatible

  Linux kernel mach directory: no code in mainline yet, planned for the future
  Linux kernel plat directory: no code in mainline yet, planned for the future

Dove family (application processor)
-----------------------------------

  Flavors:
        88AP510 a.k.a Armada 510
                Product Brief   : http://www.marvell.com/application-processors/armada-500/assets/Marvell_Armada510_SoC.pdf
                Hardware Spec   : http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Hardware-Spec.pdf
                Functional Spec : http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Functional-Spec.pdf
  Homepage: http://www.marvell.com/application-processors/armada-500/
  Core: ARMv7 compatible
  Directory: arch/arm/mach-dove

PXA 2xx/3xx/93x/95x family
--------------------------

  Flavors:
        PXA21x, PXA25x, PXA26x
             Application processor only
             Core: ARMv5 XScale core
        PXA270, PXA271, PXA272
             Product Brief         : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_pb.pdf
             Design guide          : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_design_guide.pdf
             Developers manual     : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_dev_man.pdf
             Specification         : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_emts.pdf
             Specification update  : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_spec_update.pdf
             Application processor only
             Core: ARMv5 XScale core
        PXA300, PXA310, PXA320
             PXA 300 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA300_PB_R4.pdf
             PXA 310 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA310_PB_R4.pdf
             PXA 320 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA320_PB_R4.pdf
             Design guide          : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Design_Guide.pdf
             Developers manual     : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Developers_Manual.zip
             Specifications        : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_EMTS.pdf
             Specification Update  : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Spec_Update.zip
             Reference Manual      : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_TavorP_BootROM_Ref_Manual.pdf
             Application processor only
             Core: ARMv5 XScale core
        PXA930, PXA935
             Application processor with Communication processor
             Core: ARMv5 XScale core
        PXA955
             Application processor with Communication processor
             Core: ARMv7 compatible Sheeva PJ4 core

   Comments:

    * This line of SoCs originates from the XScale family developed by
      Intel and acquired by Marvell in ~2006. The PXA21x, PXA25x,
      PXA26x, PXA27x, PXA3xx and PXA93x were developed by Intel, while
      the later PXA95x were developed by Marvell.

    * Due to their XScale origin, these SoCs have virtually nothing in
      common with the other (Kirkwood, Dove, etc.) families of Marvell
      SoCs, except with the MMP/MMP2 family of SoCs.

   Linux kernel mach directory: arch/arm/mach-pxa
   Linux kernel plat directory: arch/arm/plat-pxa

MMP/MMP2 family (communication processor)
-----------------------------------------

   Flavors:
        PXA168, a.k.a Armada 168
             Homepage             : http://www.marvell.com/application-processors/armada-100/armada-168.jsp
             Product brief        : http://www.marvell.com/application-processors/armada-100/assets/pxa_168_pb.pdf
             Hardware manual      : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_datasheet.pdf
             Software manual      : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_software_manual.pdf
             Specification update : http://www.marvell.com/application-processors/armada-100/assets/ARMADA16x_Spec_update.pdf
             Boot ROM manual      : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_ref_manual.pdf
             App node package     : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_app_note_package.pdf
             Application processor only
             Core: ARMv5 compatible Marvell PJ1 (Mohawk)
        PXA910
             Homepage             : http://www.marvell.com/communication-processors/pxa910/
             Product Brief        : http://www.marvell.com/communication-processors/pxa910/assets/Marvell_PXA910_Platform-001_PB_final.pdf
             Application processor with Communication processor
             Core: ARMv5 compatible Marvell PJ1 (Mohawk)
        MMP2, a.k.a Armada 610
             Product Brief        : http://www.marvell.com/application-processors/armada-600/assets/armada610_pb.pdf
             Application processor only
             Core: ARMv7 compatible Sheeva PJ4 core

   Comments:

    * This line of SoCs originates from the XScale family developed by
      Intel and acquired by Marvell in ~2006. All the processors of
      this MMP/MMP2 family were developed by Marvell.

    * Due to their XScale origin, these SoCs have virtually nothing in
      common with the other (Kirkwood, Dove, etc.) families of Marvell
      SoCs, except with the PXA family of SoCs listed above.

   Linux kernel mach directory: arch/arm/mach-mmp
   Linux kernel plat directory: arch/arm/plat-pxa

Long-term plans
---------------

 * Unify the mach-dove/, mach-mv78xx0/, mach-orion5x/ and
   mach-kirkwood/ into the mach-mvebu/ to support all SoCs from the
   Marvell EBU (Engineering Business Unit) in a single mach-<foo>
   directory. The plat-orion/ would therefore disappear.

 * Unify the mach-mmp/ and mach-pxa/ into the same mach-pxa
   directory. The plat-pxa/ would therefore disappear.

Credits
-------

 Maen Suleiman <maen@marvell.com>
 Lior Amsalem <alior@marvell.com>
 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 Andrew Lunn <andrew@lunn.ch>
 Nicolas Pitre <nico@fluxnic.net>
 Eric Miao <eric.y.miao@gmail.com>
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			S3C2410 GPIO Control
			S3C24XX GPIO Control
			====================

Introduction
@@ -12,7 +12,7 @@ Introduction
  of the s3c2410 GPIO system, please read the Samsung provided
  data-sheet/users manual to find out the complete list.

  See Documentation/arm/Samsung/GPIO.txt for the core implemetation.
  See Documentation/arm/Samsung/GPIO.txt for the core implementation.


GPIOLIB
@@ -41,8 +41,8 @@ GPIOLIB
GPIOLIB conversion
------------------

If you need to convert your board or driver to use gpiolib from the exiting
s3c2410 api, then here are some notes on the process.
If you need to convert your board or driver to use gpiolib from the phased
out s3c2410 API, then here are some notes on the process.

1) If your board is exclusively using an GPIO, say to control peripheral
   power, then it will require to claim the gpio with gpio_request() before
@@ -55,7 +55,7 @@ s3c2410 api, then here are some notes on the process.
   as they have the same arguments, and can either take the pin specific
   values, or the more generic special-function-number arguments.

3) s3c2410_gpio_pullup() changs have the problem that whilst the 
3) s3c2410_gpio_pullup() changes have the problem that whilst the
   s3c2410_gpio_pullup(x, 1) can be easily translated to the
   s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0)
   are not so easy.
@@ -74,7 +74,7 @@ s3c2410 api, then here are some notes on the process.
   when using gpio_get_value() on an output pin (s3c2410_gpio_getpin
   would return the value the pin is supposed to be outputting).

6) s3c2410_gpio_getirq() should be directly replacable with the
6) s3c2410_gpio_getirq() should be directly replaceable with the
   gpio_to_irq() call.

The s3c2410_gpio and gpio_ calls have always operated on the same gpio
@@ -105,7 +105,7 @@ PIN Numbers
-----------

  Each pin has an unique number associated with it in regs-gpio.h,
  eg S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell
  e.g. S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell
  the GPIO functions which pin is to be used.

  With the conversion to gpiolib, there is no longer a direct conversion
@@ -120,31 +120,27 @@ Configuring a pin
  The following function allows the configuration of a given pin to
  be changed.

    void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
    void s3c_gpio_cfgpin(unsigned int pin, unsigned int function);

  Eg:
  e.g.:

     s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0);
     s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1);
     s3c_gpio_cfgpin(S3C2410_GPA(0), S3C_GPIO_SFN(1));
     s3c_gpio_cfgpin(S3C2410_GPE(8), S3C_GPIO_SFN(2));

   which would turn GPA(0) into the lowest Address line A0, and set
   GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line.

   The s3c_gpio_cfgpin() call is a functional replacement for this call.


Reading the current configuration
---------------------------------

  The current configuration of a pin can be read by using:
  The current configuration of a pin can be read by using standard
  gpiolib function:

  s3c2410_gpio_getcfg(unsigned int pin);
  s3c_gpio_getcfg(unsigned int pin);

  The return value will be from the same set of values which can be
  passed to s3c2410_gpio_cfgpin().

  The s3c_gpio_getcfg() call should be a functional replacement for
  this call.
  passed to s3c_gpio_cfgpin().


Configuring a pull-up resistor
@@ -154,61 +150,33 @@ Configuring a pull-up resistor
  pull-up resistors enabled. This can be configured by the following
  function:

    void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);

  Where the to value is zero to set the pull-up off, and 1 to enable
  the specified pull-up. Any other values are currently undefined.

  The s3c_gpio_setpull() offers similar functionality, but with the
  ability to encode whether the pull is up or down. Currently there
  is no 'just on' state, so up or down must be selected.


Getting the state of a PIN
--------------------------

  The state of a pin can be read by using the function:

    unsigned int s3c2410_gpio_getpin(unsigned int pin);
    void s3c_gpio_setpull(unsigned int pin, unsigned int to);

  This will return either zero or non-zero. Do not count on this
  function returning 1 if the pin is set.
  Where the to value is S3C_GPIO_PULL_NONE to set the pull-up off,
  and S3C_GPIO_PULL_UP to enable the specified pull-up. Any other
  values are currently undefined.

  This call is now implemented by the relevant gpiolib calls, convert
  your board or driver to use gpiolib.


Setting the state of a PIN
--------------------------

  The value an pin is outputing can be modified by using the following:

    void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
Getting and setting the state of a PIN
--------------------------------------

  Which sets the given pin to the value. Use 0 to write 0, and 1 to
  set the output to 1.

  This call is now implemented by the relevant gpiolib calls, convert
  These calls are now implemented by the relevant gpiolib calls, convert
  your board or driver to use gpiolib.


Getting the IRQ number associated with a PIN
--------------------------------------------

  The following function can map the given pin number to an IRQ
  A standard gpiolib function can map the given pin number to an IRQ
  number to pass to the IRQ system.

   int s3c2410_gpio_getirq(unsigned int pin);
   int gpio_to_irq(unsigned int pin);

  Note, not all pins have an IRQ.

  This call is now implemented by the relevant gpiolib calls, convert
  your board or driver to use gpiolib.


Authour
Author
-------


Ben Dooks, 03 October 2004
Copyright 2004 Ben Dooks, Simtec Electronics
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@@ -5,14 +5,14 @@ Introduction
------------

This outlines the Samsung GPIO implementation and the architecture
specific calls provided alongisde the drivers/gpio core.
specific calls provided alongside the drivers/gpio core.


S3C24XX (Legacy)
----------------

See Documentation/arm/Samsung-S3C24XX/GPIO.txt for more information
about these devices. Their implementation is being brought into line
about these devices. Their implementation has been brought into line
with the core samsung implementation described in this document.


@@ -29,7 +29,7 @@ GPIO numbering is synchronised between the Samsung and gpiolib system.
PIN configuration
-----------------

Pin configuration is specific to the Samsung architecutre, with each SoC
Pin configuration is specific to the Samsung architecture, with each SoC
registering the necessary information for the core gpio configuration
implementation to configure pins as necessary.

@@ -38,5 +38,3 @@ driver or machine to change gpio configuration.

See arch/arm/plat-samsung/include/plat/gpio-cfg.h for more information
on these functions.

+3 −0
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@@ -51,6 +51,9 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned
ff000000	ffbfffff	Reserved for future expansion of DMA
				mapping region.

fee00000	feffffff	Mapping of PCI I/O space. This is a static
				mapping within the vmalloc space.

VMALLOC_START	VMALLOC_END-1	vmalloc() / ioremap() space.
				Memory returned by vmalloc/ioremap will
				be dynamically placed in this region.
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Broadcom BCM2835 device tree bindings
-------------------------------------------

Boards with the BCM2835 SoC shall have the following properties:

Required root node property:

compatible = "brcm,bcm2835";
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