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Commit 548d8495 authored by Russell King's avatar Russell King Committed by Russell King
Browse files

[ARM] omap: introduce clock operations structure



Collect up all the common enable/disable clock operation functions
into a separate operations structure.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent db8ac47c
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+27 −3
Original line number Diff line number Diff line
@@ -26,8 +26,17 @@
#include <mach/clock.h>
#include <mach/sram.h>

static const struct clkops clkops_generic;
static const struct clkops clkops_uart;
static const struct clkops clkops_dspck;

#include "clock.h"

static int omap1_clk_enable_generic(struct clk * clk);
static int omap1_clk_enable(struct clk *clk);
static void omap1_clk_disable_generic(struct clk * clk);
static void omap1_clk_disable(struct clk *clk);

__u32 arm_idlect1_mask;

/*-------------------------------------------------------------------------
@@ -78,6 +87,11 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk)
	}
}

static const struct clkops clkops_dspck = {
	.enable		= &omap1_clk_enable_dsp_domain,
	.disable	= &omap1_clk_disable_dsp_domain,
};

static int omap1_clk_enable_uart_functional(struct clk *clk)
{
	int ret;
@@ -105,6 +119,11 @@ static void omap1_clk_disable_uart_functional(struct clk *clk)
	omap1_clk_disable_generic(clk);
}

static const struct clkops clkops_uart = {
	.enable		= &omap1_clk_enable_uart_functional,
	.disable	= &omap1_clk_disable_uart_functional,
};

static void omap1_clk_allow_idle(struct clk *clk)
{
	struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
@@ -468,7 +487,7 @@ static int omap1_clk_enable(struct clk *clk)
				omap1_clk_deny_idle(clk->parent);
		}

		ret = clk->enable(clk);
		ret = clk->ops->enable(clk);

		if (unlikely(ret != 0) && clk->parent) {
			omap1_clk_disable(clk->parent);
@@ -482,7 +501,7 @@ static int omap1_clk_enable(struct clk *clk)
static void omap1_clk_disable(struct clk *clk)
{
	if (clk->usecount > 0 && !(--clk->usecount)) {
		clk->disable(clk);
		clk->ops->disable(clk);
		if (likely(clk->parent)) {
			omap1_clk_disable(clk->parent);
			if (clk->flags & CLOCK_NO_IDLE_PARENT)
@@ -561,6 +580,11 @@ static void omap1_clk_disable_generic(struct clk *clk)
	}
}

static const struct clkops clkops_generic = {
	.enable		= &omap1_clk_enable_generic,
	.disable	= &omap1_clk_disable_generic,
};

static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
{
	int dsor_exp;
@@ -659,7 +683,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
	}

	printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
	clk->disable(clk);
	clk->ops->disable(clk);
	printk(" done\n");
}

+48 −104

File changed.

Preview size limit exceeded, changes collapsed.

+4 −4
Original line number Diff line number Diff line
@@ -274,8 +274,8 @@ int _omap2_clk_enable(struct clk *clk)
	if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK))
		return 0;

	if (clk->enable)
		return clk->enable(clk);
	if (clk->ops && clk->ops->enable)
		return clk->ops->enable(clk);

	if (unlikely(clk->enable_reg == NULL)) {
		printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
@@ -304,8 +304,8 @@ void _omap2_clk_disable(struct clk *clk)
	if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK))
		return;

	if (clk->disable) {
		clk->disable(clk);
	if (clk->ops && clk->ops->disable) {
		clk->ops->disable(clk);
		return;
	}

+15 −1
Original line number Diff line number Diff line
@@ -34,12 +34,16 @@

#include "memory.h"
#include "clock.h"
#include "clock24xx.h"
#include "prm.h"
#include "prm-regbits-24xx.h"
#include "cm.h"
#include "cm-regbits-24xx.h"

static const struct clkops clkops_oscck;
static const struct clkops clkops_fixed;

#include "clock24xx.h"

/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
#define EN_APLL_STOPPED			0
#define EN_APLL_LOCKED			3
@@ -96,6 +100,11 @@ static void omap2_disable_osc_ck(struct clk *clk)
		      OMAP24XX_PRCM_CLKSRC_CTRL);
}

static const struct clkops clkops_oscck = {
	.enable		= &omap2_enable_osc_ck,
	.disable	= &omap2_disable_osc_ck,
};

#ifdef OLD_CK
/* Recalculate SYST_CLK */
static void omap2_sys_clk_recalc(struct clk * clk)
@@ -149,6 +158,11 @@ static void omap2_clk_fixed_disable(struct clk *clk)
	cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
}

static const struct clkops clkops_fixed = {
	.enable		= &omap2_clk_fixed_enable,
	.disable	= &omap2_clk_fixed_disable,
};

/*
 * Uses the current prcm set to tell if a rate is valid.
 * You can go slower, but not faster within a given rate set.
+3 −10
Original line number Diff line number Diff line
@@ -31,10 +31,6 @@ static void omap2_sys_clk_recalc(struct clk *clk);
static void omap2_osc_clk_recalc(struct clk *clk);
static void omap2_sys_clk_recalc(struct clk *clk);
static void omap2_dpllcore_recalc(struct clk *clk);
static int omap2_clk_fixed_enable(struct clk *clk);
static void omap2_clk_fixed_disable(struct clk *clk);
static int omap2_enable_osc_ck(struct clk *clk);
static void omap2_disable_osc_ck(struct clk *clk);
static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);

/* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
@@ -633,11 +629,10 @@ static struct clk func_32k_ck = {
/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
static struct clk osc_ck = {		/* (*12, *13, 19.2, *26, 38.4)MHz */
	.name		= "osc_ck",
	.ops		= &clkops_oscck,
	.flags		= CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
				RATE_PROPAGATES,
	.clkdm_name	= "wkup_clkdm",
	.enable		= &omap2_enable_osc_ck,
	.disable	= &omap2_disable_osc_ck,
	.recalc		= &omap2_osc_clk_recalc,
};

@@ -695,6 +690,7 @@ static struct clk dpll_ck = {

static struct clk apll96_ck = {
	.name		= "apll96_ck",
	.ops		= &clkops_fixed,
	.parent		= &sys_ck,
	.rate		= 96000000,
	.flags		= CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
@@ -702,13 +698,12 @@ static struct clk apll96_ck = {
	.clkdm_name	= "wkup_clkdm",
	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
	.enable_bit	= OMAP24XX_EN_96M_PLL_SHIFT,
	.enable		= &omap2_clk_fixed_enable,
	.disable	= &omap2_clk_fixed_disable,
	.recalc		= &propagate_rate,
};

static struct clk apll54_ck = {
	.name		= "apll54_ck",
	.ops		= &clkops_fixed,
	.parent		= &sys_ck,
	.rate		= 54000000,
	.flags		= CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
@@ -716,8 +711,6 @@ static struct clk apll54_ck = {
	.clkdm_name	= "wkup_clkdm",
	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
	.enable_bit	= OMAP24XX_EN_54M_PLL_SHIFT,
	.enable		= &omap2_clk_fixed_enable,
	.disable	= &omap2_clk_fixed_disable,
	.recalc		= &propagate_rate,
};

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