Commit 5437ded8 authored Nov 19, 2015 by Taniya Das

clk: msm: clock-gcc: Update the mux sel for bimc clock



The bimc clock mux value has been updated from the current value to 0x15a
which will update the bimc channel-0 frequency.

Change-Id: I6ad52e03e0f9bf432bd8cd7a39462ac74241bd96
Signed-off-by: Taniya Das <tdas@codeaurora.org>

parent ec7db6c5

drivers/clk/msm/clock-gcc-titanium.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -3281,7 +3281,7 @@ static struct mux_clk gcc_debug_mux = {
		{ &snoc_clk.c, 0x0000 },
		{ &sysmmnoc_clk.c, 0x0001 },
		{ &pcnoc_clk.c, 0x0008 },
		{ &bimc_clk.c, 0x154 },
		{ &bimc_clk.c, 0x15A },
		{ &gcc_dcc_clk.c, 0x000d },
		{ &gcc_pcnoc_usb3_axi_clk.c, 0x000e },
		{ &gcc_gp1_clk.c, 0x0010 },