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Commit 52c95464 authored by Amit Nischal's avatar Amit Nischal Committed by Gerrit - the friendly Code Review server
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clk: msm: gcc: Add parent for gcc_oxili_timer_clk 



For gcc_oxili_timer_clk clock, rate setting request of 19.2 MHz is
getting failed from KGSL driver so fixing the same by adding the
XO as a parent.

Change-Id: I2444e4df80336ca42c525e149fd96c18cfe43630
Signed-off-by: default avatarAmit Nischal <anischal@codeaurora.org>
parent c84700b1

drivers/clk/msm/clock-gcc-8953.c

+1 −0
Original line number Diff line number Diff line
@@ -2785,6 +2785,7 @@ static struct branch_clk gcc_oxili_timer_clk = { 
	.base = &virt_bases[GFX_BASE],

	.c = {

		.dbg_name = "gcc_oxili_timer_clk",

		.parent = &xo_clk_src.c,

		.ops = &clk_ops_branch,

		CLK_INIT(gcc_oxili_timer_clk.c),

	},