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Commit 52bb4a73 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-next' of git://git.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes 

* 'drm-nouveau-next' of git://git.freedesktop.org/git/nouveau/linux-2.6:
  drm/nvc0/grctx: correct an off-by-one
  drm/nv50: Fix race with PFIFO during PGRAPH context destruction.
  drm/nouveau: Workaround incorrect DCB entry on a GeForce3 Ti 200.
  drm/nvc0: implement irq handler for whatever's at 0x14xxxx
  drm/nvc0: fix incorrect TPC register setup
  drm/nouveau: probe for adt7473 before f75375
  drm/nouveau: remove dead function definition
parents 6663050e 5d079298

drivers/gpu/drm/nouveau/nouveau_bios.c

+15 −0
Original line number Diff line number Diff line
@@ -6310,6 +6310,9 @@ void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 
static bool

apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct dcb_table *dcb = &dev_priv->vbios.dcb;



	/* Dell Precision M6300

	 *   DCB entry 2: 02025312 00000010

	 *   DCB entry 3: 02026312 00000020
@@ -6327,6 +6330,18 @@ apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 
			return false;

	}



	/* GeForce3 Ti 200

	 *

	 * DCB reports an LVDS output that should be TMDS:

	 *   DCB entry 1: f2005014 ffffffff

	 */

	if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {

		if (*conn == 0xf2005014 && *conf == 0xffffffff) {

			fabricate_dcb_output(dcb, OUTPUT_TMDS, 1, 1, 1);

			return false;

		}

	}



	return true;

}

drivers/gpu/drm/nouveau/nouveau_drv.h

+0 −3
Original line number Diff line number Diff line
@@ -848,9 +848,6 @@ extern void nv10_mem_put_tile_region(struct drm_device *dev, 
				     struct nouveau_fence *fence);

extern const struct ttm_mem_type_manager_func nouveau_vram_manager;



/* nvc0_vram.c */

extern const struct ttm_mem_type_manager_func nvc0_vram_manager;



/* nouveau_notifier.c */

extern int  nouveau_notifier_init_channel(struct nouveau_channel *);

extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);

drivers/gpu/drm/nouveau/nouveau_temp.c

+1 −1
Original line number Diff line number Diff line
@@ -265,8 +265,8 @@ nouveau_temp_probe_i2c(struct drm_device *dev) 
	struct i2c_board_info info[] = {

		{ I2C_BOARD_INFO("w83l785ts", 0x2d) },

		{ I2C_BOARD_INFO("w83781d", 0x2d) },

		{ I2C_BOARD_INFO("f75375", 0x2e) },

		{ I2C_BOARD_INFO("adt7473", 0x2e) },

		{ I2C_BOARD_INFO("f75375", 0x2e) },

		{ I2C_BOARD_INFO("lm99", 0x4c) },

		{ }

	};

drivers/gpu/drm/nouveau/nv50_graph.c

+3 −0
Original line number Diff line number Diff line
@@ -256,6 +256,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan) 
	struct drm_device *dev = chan->dev;

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;

	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;

	int i, hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20;

	unsigned long flags;
@@ -265,6 +266,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan) 
		return;



	spin_lock_irqsave(&dev_priv->context_switch_lock, flags);

	pfifo->reassign(dev, false);

	pgraph->fifo_access(dev, false);



	if (pgraph->channel(dev) == chan)
@@ -275,6 +277,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan) 
	dev_priv->engine.instmem.flush(dev);



	pgraph->fifo_access(dev, true);

	pfifo->reassign(dev, true);

	spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);



	nouveau_gpuobj_ref(NULL, &chan->ramin_grctx);

drivers/gpu/drm/nouveau/nvc0_graph.c

+21 −2
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#include "nvc0_graph.h"



static void nvc0_graph_isr(struct drm_device *);

static void nvc0_runk140_isr(struct drm_device *);

static int  nvc0_graph_unload_context_to(struct drm_device *dev, u64 chan);



void
@@ -281,6 +282,7 @@ nvc0_graph_destroy(struct drm_device *dev) 
		return;



	nouveau_irq_unregister(dev, 12);

	nouveau_irq_unregister(dev, 25);



	nouveau_gpuobj_ref(NULL, &priv->unk4188b8);

	nouveau_gpuobj_ref(NULL, &priv->unk4188b4);
@@ -390,6 +392,7 @@ nvc0_graph_create(struct drm_device *dev) 
	}



	nouveau_irq_register(dev, 12, nvc0_graph_isr);

	nouveau_irq_register(dev, 25, nvc0_runk140_isr);

	NVOBJ_CLASS(dev, 0x902d, GR); /* 2D */

	NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */

	NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */
@@ -512,8 +515,8 @@ nvc0_graph_init_gpc_1(struct drm_device *dev) 
			nv_wr32(dev, TP_UNIT(gpc, tp, 0x224), 0xc0000000);

			nv_wr32(dev, TP_UNIT(gpc, tp, 0x48c), 0xc0000000);

			nv_wr32(dev, TP_UNIT(gpc, tp, 0x084), 0xc0000000);

			nv_wr32(dev, TP_UNIT(gpc, tp, 0xe44), 0x001ffffe);

			nv_wr32(dev, TP_UNIT(gpc, tp, 0xe4c), 0x0000000f);

			nv_wr32(dev, TP_UNIT(gpc, tp, 0x644), 0x001ffffe);

			nv_wr32(dev, TP_UNIT(gpc, tp, 0x64c), 0x0000000f);

		}

		nv_wr32(dev, GPC_UNIT(gpc, 0x2c90), 0xffffffff);

		nv_wr32(dev, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
@@ -777,3 +780,19 @@ nvc0_graph_isr(struct drm_device *dev) 


	nv_wr32(dev, 0x400500, 0x00010001);

}



static void

nvc0_runk140_isr(struct drm_device *dev)

{

	u32 units = nv_rd32(dev, 0x00017c) & 0x1f;



	while (units) {

		u32 unit = ffs(units) - 1;

		u32 reg = 0x140000 + unit * 0x2000;

		u32 st0 = nv_mask(dev, reg + 0x1020, 0, 0);

		u32 st1 = nv_mask(dev, reg + 0x1420, 0, 0);



		NV_INFO(dev, "PRUNK140: %d 0x%08x 0x%08x\n", unit, st0, st1);

		units &= ~(1 << unit);

	}

}