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Commit 52585ccd authored by Haojian Zhuang's avatar Haojian Zhuang Committed by Eric Miao
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ARM: pxa: add clk_set_rate()



Since there're mulitple clock rates in some device controllers, enable
clk_set_rate() for this usage.

Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: default avatarEric Miao <eric.y.miao@gmail.com>
parent 4e234cc0
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+15 −0
Original line number Diff line number Diff line
@@ -88,3 +88,18 @@ unsigned long clk_get_rate(struct clk *clk)
	return rate;
}
EXPORT_SYMBOL(clk_get_rate);

int clk_set_rate(struct clk *clk, unsigned long rate)
{
	unsigned long flags;
	int ret = -EINVAL;

	if (clk->ops->setrate) {
		spin_lock_irqsave(&clocks_lock, flags);
		ret = clk->ops->setrate(clk, rate);
		spin_unlock_irqrestore(&clocks_lock, flags);
	}

	return ret;
}
EXPORT_SYMBOL(clk_set_rate);
+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ struct clkops {
	void			(*enable)(struct clk *);
	void			(*disable)(struct clk *);
	unsigned long		(*getrate)(struct clk *);
	int			(*setrate)(struct clk *, unsigned long);
};

struct clk {
+15 −0
Original line number Diff line number Diff line
@@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_rate);

int clk_set_rate(struct clk *clk, unsigned long rate)
{
	unsigned long flags;
	int ret = -EINVAL;

	if (clk->ops->setrate) {
		spin_lock_irqsave(&clocks_lock, flags);
		ret = clk->ops->setrate(clk, rate);
		spin_unlock_irqrestore(&clocks_lock, flags);
	}

	return ret;
}
EXPORT_SYMBOL(clk_set_rate);

void clk_dummy_enable(struct clk *clk)
{
}
+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ struct clkops {
	void			(*enable)(struct clk *);
	void			(*disable)(struct clk *);
	unsigned long		(*getrate)(struct clk *);
	int			(*setrate)(struct clk *, unsigned long);
};

struct clk {