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Commit 511406b9 authored by Steven Cahail's avatar Steven Cahail
Browse files

ARM: dts: msm: Add SMEM entry for MSMCOBALT 



Add the SMEM entry to enable the use of shared memory by different
processors in the SoC.

Change-Id: Ie0cafe7fce75f4652a8d8915fdc18867af7de0b2
Signed-off-by: default avatarSteven Cahail <scahail@codeaurora.org>
parent 989f05e4

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+39 −0
Original line number Diff line number Diff line
@@ -211,4 +211,43 @@ 
		reg = <0x1f40000 0x8000>;

		qcom,num-locks = <8>;

	};



	qcom,smem@86000000 {

		compatible = "qcom,smem";

		reg = <0x86000000 0x200000>,

			<0x17820010 0x4>,

			<0x778000 0x8000>,

			<0x1fd4000 0x8>;

		reg-names = "smem", "irq-reg-base", "aux-mem1",

			"smem_targ_info_reg";

		qcom,mpu-enabled;



		qcom,smd-modem {

			compatible = "qcom,smd";

			qcom,smd-edge = <0>;

			qcom,smd-irq-offset = <0x0>;

			qcom,smd-irq-bitmask = <0x1000>;

			interrupts = <0 449 1>;

			label = "modem";

			qcom,not-loadable;

		};



		qcom,smd-adsp {

			compatible = "qcom,smd";

			qcom,smd-edge = <1>;

			qcom,smd-irq-offset = <0x0>;

			qcom,smd-irq-bitmask = <0x100>;

			interrupts = <0 156 1>;

			label = "adsp";

		};



		qcom,smd-dsps {

			compatible = "qcom,smd";

			qcom,smd-edge = <3>;

			qcom,smd-irq-offset = <0x0>;

			qcom,smd-irq-bitmask = <0x2000000>;

			interrupts = <0 176 1>;

			label = "dsps";

		};

	};

};