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Commit 50d1c65c authored by Jin Li's avatar Jin Li
Browse files

drm/sde: add panel count to support multiple bridge chips 



When multiple bridge chips are connected to same interface, the
drm mode in the mode_set has combined timing parameters. For
each individual bridge chip, those timing parameters need to
be divided by panel count.

CRs-Fixed: 1085590
Change-Id: I9af0fa99ab6bcf9e09f4f7b372d53e6f1638e6d0
Signed-off-by: default avatarJin Li <jinl@codeaurora.org>
parent d0c1fd74

drivers/gpu/drm/msm/dba_bridge.c

+12 −0
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ 
 * @hdmi_mode:          HDMI or DVI mode for the sink

 * @num_of_input_lanes: Number of input lanes in case of DSI/LVDS

 * @pluggable:          If it's pluggable

 * @panel_count:        Number of panels attached to this display

 */

struct dba_bridge {

	struct drm_bridge base;
@@ -48,6 +49,7 @@ struct dba_bridge { 
	bool hdmi_mode;

	u32 num_of_input_lanes;

	bool pluggable;

	u32 panel_count;

};

#define to_dba_bridge(x)     container_of((x), struct dba_bridge, base)
@@ -225,9 +227,18 @@ static void _dba_bridge_mode_set(struct drm_bridge *bridge, 
	if (!bridge || !mode || !adjusted_mode || !d_bridge) {

		SDE_ERROR("Invalid params\n");

		return;

	} else if (!d_bridge->panel_count) {

		SDE_ERROR("Panel count is 0\n");

		return;

	}



	d_bridge->mode = *adjusted_mode;

	/* Adjust mode according to number of panels */

	d_bridge->mode.hdisplay /= d_bridge->panel_count;

	d_bridge->mode.hsync_start /= d_bridge->panel_count;

	d_bridge->mode.hsync_end /= d_bridge->panel_count;

	d_bridge->mode.htotal /= d_bridge->panel_count;

	d_bridge->mode.clock /= d_bridge->panel_count;

}



static bool _dba_bridge_mode_fixup(struct drm_bridge *bridge,
@@ -293,6 +304,7 @@ struct drm_bridge *dba_bridge_init(struct drm_device *dev, 
	bridge->hdmi_mode = data->hdmi_mode;

	bridge->num_of_input_lanes = data->num_of_input_lanes;

	bridge->pluggable = data->pluggable;

	bridge->panel_count = data->panel_count;

	bridge->base.funcs = &_dba_bridge_ops;

	bridge->base.encoder = encoder;

drivers/gpu/drm/msm/dba_bridge.h

+2 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
 * @num_of_input_lanes:   Number of input lanes in case of DSI/LVDS

 * @precede_bridge:       Precede bridge chip

 * @pluggable:            If it's pluggable

 * @panel_count:          Number of panels attached to this display

 */

struct dba_bridge_init {

	const char *client_name;
@@ -42,6 +43,7 @@ struct dba_bridge_init { 
	u32 num_of_input_lanes;

	struct drm_bridge *precede_bridge;

	bool pluggable;

	u32 panel_count;

};



/**

drivers/gpu/drm/msm/dsi-staging/dsi_display.c

+1 −0
Original line number Diff line number Diff line
@@ -2051,6 +2051,7 @@ int dsi_display_drm_bridge_init(struct dsi_display *display, 
			init_data.hdmi_mode = panel->dba_config.hdmi_mode;

			init_data.num_of_input_lanes = num_of_lanes;

			init_data.precede_bridge = precede_bridge;

			init_data.panel_count = display->panel_count;

			dba_bridge = dba_bridge_init(display->drm_dev, enc,

							&init_data);

			if (IS_ERR_OR_NULL(dba_bridge)) {