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Commit 509e51c3 authored by Glenn Stroz's avatar Glenn Stroz
Browse files

ARM: dts: msm: Add device tree for APQ8096 drone platform 



Adds the devicetree for the 8096 drone platform. This platform is
different than other msm8996 platform in that it has no display panel or
touch support. There is no NFC or pcie1/2 bus support. Wifi is supported
with rome and a number of SPI/I2C/UART buses have been made available
for controlling flight and sensor functionality. A sensor file has been
added in case users wish to enable sensor controls from the apps
processor instead of SLPI.

CRs-Fixed: 1053007
Change-Id: I2c7c51f8e0347bd9ccb543284d88d94f6efbb445
Signed-off-by: default avatarGlenn Stroz <gstroz@codeaurora.org>
parent e7587c62

arch/arm/boot/dts/qcom/Makefile

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Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-pmi8994-cdp.dtb \ 
	apq8096-v3-auto-dragonboard.dtb \

	apq8096-v3-auto-adp.dtb \

	apq8096-v3-auto-cdp.dtb \

	apq8096-v3-drone.dtb \

	apq8096-v3.0-pmi8994-cdp.dtb \

	apq8096-v3.0-pmi8994-mtp.dtb \

	apq8096-v3.0-pmi8994-pm8004-cdp.dtb \

arch/arm/boot/dts/qcom/apq8096-camera-sensor-drone.dtsi

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/*

 * Copyright (c) 2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/*

 * Note: default configuration is for the camera modules to be powered

 * by the PMIC from the CSI connector. Alternative configuration is for

 * self-powered camera modules.

 */

&cci {

	actuator0: qcom,actuator@0 {

		cell-index = <0>;

		reg = <0x0>;

		compatible = "qcom,actuator";

		qcom,cci-master = <0>;

		cam_vaf-supply = <&pm8994_l23>;

		qcom,cam-vreg-name = "cam_vaf";

		qcom,cam-vreg-min-voltage = <2800000>;

		qcom,cam-vreg-max-voltage = <2800000>;

		qcom,cam-vreg-op-mode = <100000>;

	};



	actuator1: qcom,actuator@1 {

		cell-index = <1>;

		reg = <0x1>;

		compatible = "qcom,actuator";

		qcom,cci-master = <1>;

		cam_vaf-supply = <&pm8994_l23>;

		qcom,cam-vreg-name = "cam_vaf";

		qcom,cam-vreg-min-voltage = <2800000>;

		qcom,cam-vreg-max-voltage = <2800000>;

		qcom,cam-vreg-op-mode = <100000>;

	};



	eeprom0: qcom,eeprom@0 {

		cell-index = <0>;

		reg = <0>;

		qcom,eeprom-name = "onsemi_cat24c32";

		compatible = "qcom,eeprom";

		qcom,slave-addr = <0xa0>;

		qcom,cci-master = <0>;

		qcom,num-blocks = <1>;

		qcom,page0 = <0 0 0 0 0 0>;

		qcom,poll0 = <0 0 0 0 0 0>;

		qcom,saddr0 = <0xa0>;

		qcom,mem0 = <2245 0x00 2 0 1 0>;

		cam_vio-supply = <&pm8994_lvs1>;

		qcom,cam-vreg-name = "cam_vio";

		qcom,cam-vreg-min-voltage = <0>;

		qcom,cam-vreg-max-voltage = <0>;

		qcom,cam-vreg-op-mode = <0>;

		qcom,cam-power-seq-type = "sensor_vreg";

		qcom,cam-power-seq-val = "cam_vio";

		qcom,cam-power-seq-cfg-val = <1>;

		qcom,cam-power-seq-delay = <1>;

	};



	eeprom1: qcom,eeprom@1 {

		cell-index = <1>;

		reg = <0x1>;

		qcom,eeprom-name = "onsemi_cat24c16";

		compatible = "qcom,eeprom";

		qcom,slave-addr = <0xa0>;

		qcom,cci-master = <1>;

		qcom,num-blocks = <7>;



		qcom,page0 = <0 0 0 0 0 0>;

		qcom,poll0 = <0 0 0 0 0 0>;

		qcom,saddr0 = <0xa0>;

		qcom,mem0 = <256 0x00 1 0 1 0>;



		qcom,page1 = <0 0 0 0 0 0>;

		qcom,poll1 = <0 0 0 0 0 0>;

		qcom,saddr1 = <0xa2>;

		qcom,mem1 = <256 0x00 1 0 1 0>;



		qcom,page2 = <0 0 0 0 0 0>;

		qcom,poll2 = <0 0 0 0 0 0>;

		qcom,saddr2 = <0xa4>;

		qcom,mem2 = <256 0x00 1 0 1 0>;



		qcom,page3 = <0 0 0 0 0 0>;

		qcom,poll3 = <0 0 0 0 0 0>;

		qcom,saddr3 = <0xa6>;

		qcom,mem3 = <256 0x00 1 0 1 0>;



		qcom,page4 = <0 0 0 0 0 0>;

		qcom,poll4 = <0 0 0 0 0 0>;

		qcom,saddr4 = <0xa8>;

		qcom,mem4 = <256 0x00 1 0 1 0>;



		qcom,page5 = <0 0 0 0 0 0>;

		qcom,poll5 = <0 0 0 0 0 0>;

		qcom,saddr5 = <0xaa>;

		qcom,mem5 = <256 0x00 1 0 1 0>;



		qcom,page6 = <0 0 0 0 0 0>;

		qcom,poll6 = <0 0 0 0 0 0>;

		qcom,saddr6 = <0xac>;

		qcom,mem6 = <254 0x00 1 0 1 0>;



		cam_vio-supply = <&pm8994_lvs1>;

		qcom,cam-vreg-name = "cam_vio";

		qcom,cam-vreg-min-voltage = <0>;

		qcom,cam-vreg-max-voltage = <0>;

		qcom,cam-vreg-op-mode = <0>;

		qcom,cam-power-seq-type = "sensor_vreg";

		qcom,cam-power-seq-val = "cam_vio";

		qcom,cam-power-seq-cfg-val = <1>;

		qcom,cam-power-seq-delay = <1>;

	};



	qcom,camera@0 {

		cell-index = <0>;

		compatible = "qcom,camera";

		reg = <0x0>;

		qcom,csiphy-sd-index = <0>;

		qcom,csid-sd-index = <0>;

		qcom,mount-angle = <0>;

		qcom,actuator-src = <&actuator0>;

		qcom,eeprom-src = <&eeprom0>;

		cam_vdig-supply = <&vph_pwr_vreg>;

		/* Cameras powered by PMIC: */

		cam_vio-supply = <&pm8994_lvs1>;

		cam_vana-supply = <&pm8994_l17>;

		qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";

		qcom,cam-vreg-min-voltage = <1300000 0 2500000>;

		qcom,cam-vreg-max-voltage = <1300000 0 2500000>;

		qcom,cam-vreg-op-mode = <105000 0 80000>;

		qcom,gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";

		pinctrl-0 = <&cam_sensor_mclk0_active &cam_csi0_sensor_active>;

		pinctrl-1 = <&cam_sensor_mclk0_suspend

				&cam_csi0_sensor_suspend>;

		gpios = <&tlmm 13 0>,

			<&tlmm 63 0>,

			<&tlmm 62 0>;

		qcom,gpio-reset = <1>;

		qcom,gpio-standby = <2>;

		qcom,gpio-req-tbl-num = <0 1 2>;

		qcom,gpio-req-tbl-flags = <1 0 0>;

		qcom,gpio-req-tbl-label = "CAMIF_MCLK0",

					  "CAM_RESET0",

					  "CAM_STANDBY0";

		qcom,sensor-position = <0>;

		qcom,sensor-mode = <0>;

		qcom,cci-master = <0>;

		status = "ok";

		clocks = <&clock_mmss clk_mclk0_clk_src>,

				<&clock_mmss clk_camss_mclk0_clk>;

		clock-names = "cam_src_clk", "cam_clk";

		qcom,clock-rates = <24000000 0>;

	};



	qcom,camera@1 {

		cell-index = <1>;

		compatible = "qcom,camera";

		reg = <0x1>;

		qcom,csiphy-sd-index = <1>;

		qcom,csid-sd-index = <1>;

		qcom,mount-angle = <0>;

		cam_vdig-supply = <&vph_pwr_vreg>;

		/* Cameras powered by PMIC: */

		cam_vio-supply = <&pm8994_s4>;

		cam_vana-supply = <&pm8994_l18>;

		qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";

		qcom,cam-vreg-min-voltage = <1000000 0 3150000>;

		qcom,cam-vreg-max-voltage = <1000000 0 3600000>;

		qcom,cam-vreg-op-mode = <105000 0 80000>;

		qcom,gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";

		pinctrl-0 = <&cam_sensor_mclk1_active &cam_csi1_sensor_active>;

		pinctrl-1 = <&cam_sensor_mclk1_suspend

				&cam_csi1_sensor_suspend>;

		gpios = <&tlmm 14 0>,

			<&tlmm 30 0>,

			<&tlmm 29 0>;

		qcom,gpio-reset = <1>;

		qcom,gpio-standby = <2>;

		qcom,gpio-req-tbl-num = <0 1 2>;

		qcom,gpio-req-tbl-flags = <1 0 0>;

		qcom,gpio-req-tbl-label = "CAMIF_MCLK1",

					  "CAM_RESET1",

					  "CAM_STANDBY1";

		qcom,sensor-position = <0>;

		qcom,sensor-mode = <0>;

		qcom,cci-master = <0>;

		status = "ok";

		clocks = <&clock_mmss clk_mclk1_clk_src>,

			<&clock_mmss clk_camss_mclk1_clk>;

		clock-names = "cam_src_clk", "cam_clk";

		qcom,clock-rates = <24000000 0>;

	};



	qcom,camera@2 {

		cell-index = <2>;

		compatible = "qcom,camera";

		reg = <0x02>;

		qcom,csiphy-sd-index = <2>;

		qcom,csid-sd-index = <2>;

		qcom,mount-angle = <0>;

		qcom,eeprom-src = <&eeprom1>;

		qcom,actuator-src = <&actuator1>;

		/* Cameras powered by PMIC: */

		cam_vdig-supply = <&vph_pwr_vreg>;

		cam_vio-supply = <&pm8994_lvs1>;

		cam_vana-supply = <&pm8994_l29>;

		qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";

		qcom,cam-vreg-min-voltage = <1000000 0 2800000>;

		qcom,cam-vreg-max-voltage = <1000000 0 2800000>;

		qcom,cam-vreg-op-mode = <105000 0 80000>;

		qcom,gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";

		pinctrl-0 = <&cam_sensor_mclk2_active &cam_csi2_sensor_active>;

		pinctrl-1 = <&cam_sensor_mclk2_suspend

				&cam_csi2_sensor_suspend>;

		gpios = <&tlmm 15 0>,

			<&tlmm 23 0>,

			<&tlmm 133 0>;

		qcom,gpio-reset = <1>;

		qcom,gpio-standby = <2>;

		qcom,gpio-req-tbl-num = <0 1 2>;

		qcom,gpio-req-tbl-flags = <1 0 0>;

		qcom,gpio-req-tbl-label = "CAMIF_MCLK2",

					  "CAM_RESET2",

					  "CAM_STANDBY2";

		qcom,sensor-position = <1>;

		qcom,sensor-mode = <0>;

		qcom,cci-master = <1>;

		status = "ok";

		clocks = <&clock_mmss clk_mclk2_clk_src>,

			<&clock_mmss clk_camss_mclk2_clk>;

		clock-names = "cam_src_clk", "cam_clk";

		qcom,clock-rates = <24000000 0>;

	};

};

arch/arm/boot/dts/qcom/apq8096-drone-sensors.dtsi

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/* Copyright (c) 2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&uartblsp2dm1 {

	status = "ok";

	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_active>;

};



&soc {

	i2c@757a000 { /* HW BLSP6 - I2C */

		status = "disabled"; /* For external GPS magnetometer */

	};



	i2c@75b6000 { /* HW BLSP8 */

		status = "disabled"; /* Disabled for use by SLPI */

	};



	i2c_12: i2c@75ba000 {

		status = "disabled"; /* Disabled for use by SLPI */

	};



	tlmm: pinctrl@01010000 {

		spi_0_cs {

			spi_0_cs0_active: spi_0_cs0_active {

				mux {

					pins = "gpio2";

					function = "blsp1_spi";

				};



				config {

					pins = "gpio2";

					drive-strength = <6>;

					bias-pull-up;

				};

			};



			spi_0_cs0_sleep: spi_0_cs0_sleep {

				mux {

					pins = "gpio2";

					function = "blsp1_spi";

				};



				config {

					pins = "gpio2";

					drive-strength = <6>;

					bias-pull-up;

				};

			};



			spi_0_cs1_active: spi_0_cs1_active {

				mux {

					pins = "gpio90";

					function = "blsp1_spi";

				};



				config {

					pins = "gpio90";

					drive-strength = <6>;

					bias-pull-up;

				};

			};



			spi_0_cs1_sleep: spi_0_cs1_sleep {

				mux {

					pins = "gpio90";

					function = "blsp1_spi";

				};



				config {

					pins = "gpio90";

					drive-strength = <6>;

					bias-pull-up;

				};

			};

		};

	};



	i2c_3: i2c@7577000 { /* BLSP1 QUP3 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0x7577000  0x1000>;

		reg-names = "qup_phys_addr";

		interrupt-names = "qup_irq";

		interrupts = <0 97 0>;

		dmas = <&dma_blsp1 16 32 0x20000020 0x20>,

			<&dma_blsp1 17 32 0x20000020 0x20>;

		dma-names = "tx", "rx";

		qcom,master-id = <86>;

		qcom,clk-freq-out = <400000>;

		qcom,clk-freq-in  = <19200000>;

		clock-names = "iface_clk", "core_clk";

		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,

			 <&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>;

		pinctrl-names = "i2c_active", "i2c_sleep";

		pinctrl-0 = <&i2c_3_active>;

		pinctrl-1 = <&i2c_3_sleep>;

		status = "disabled";

	};



	i2c_7: i2c@75b5000 { /* BLSP2 QUP1 */

		status = "disabled";

	};



	blsp2_uart3: uart@075b1000 { /* HW-BLSP9 = BLSP2 UART3 */

		compatible = "qcom,msm-hsuart-v14";

		reg = <0x075b1000 0x1000>,

		    <0x7584000 0x2b000>;

		status = "disabled"; /* External GNSS disabled */

		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp2_uart3>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 115 0

						 1 &intc 0 0 239 0

						 2 &tlmm 42 0>;



		qcom,bam-tx-ep-pipe-index = <4>;

		qcom,bam-rx-ep-pipe-index = <5>;

		qcom,master-id = <84>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_uart3_apps_clk>,

		    <&clock_gcc clk_gcc_blsp2_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp2_uart3_sleep>;

		pinctrl-1 = <&blsp2_uart3_active>;



		qcom,msm-bus,name = "buart9";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			    <86 512 0 0>,

			    <86 512 500 800>;

	};



	blsp2_uart6: uart@075b4000 { /* HW-BLSP12 = BLSP2 UART6 */

		compatible = "qcom,msm-hsuart-v14";

		reg = <0x075b4000 0x1000>,

		    <0x7584000 0x2b000>;

		status = "disabled"; /* Spektrum/Exp sensor connector */

		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp2_uart6>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 118 0

						 1 &intc 0 0 239 0

						 2 &tlmm 42 0>;



		qcom,bam-tx-ep-pipe-index = <10>;

		qcom,bam-rx-ep-pipe-index = <11>;

		qcom,master-id = <84>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_uart6_apps_clk>,

		    <&clock_gcc clk_gcc_blsp2_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp2_uart6_sleep>;

		pinctrl-1 = <&blsp2_uart6_active>;



		qcom,msm-bus,name = "buart12";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			    <86 512 0 0>,

			    <86 512 500 800>;

	};



	blsp1_uart5: uart@07573000 { /* HW-BLSP5 = BLSP1 UART5 */

		compatible = "qcom,msm-hsuart-v14";

		reg = <0x07573000 0x1000>,

		    <0x7544000 0x2b000>;

		status = "disabled"; /* Disabled */

		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp1_uart5>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 111 0

						 1 &intc 0 0 238 0

						 2 &tlmm 42 0>;



		qcom,bam-tx-ep-pipe-index = <8>;

		qcom,bam-rx-ep-pipe-index = <9>;

		qcom,master-id = <86>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp1_uart5_apps_clk>,

		    <&clock_gcc clk_gcc_blsp1_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp1_uart5_sleep>;

		pinctrl-1 = <&blsp1_uart5_active>;



		qcom,msm-bus,name = "buart5";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			    <86 512 0 0>,

			    <86 512 500 800>;

	};



	blsp2_uart1: uart@075af000 { /* HW-BLSP7 = BLSP2 UART1 */

		compatible = "qcom,msm-hsuart-v14";

		reg = <0x075af000 0x1000>,

			<0x7584000 0x2b000>;

		status = "disabled"; /* External IMU disabled */

		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp2_uart1>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 113 0

						 1 &intc 0 0 239 0

						 2 &tlmm 42 0>;



		qcom,bam-tx-ep-pipe-index = <0>;

		qcom,bam-rx-ep-pipe-index = <1>;

		qcom,master-id = <84>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_uart1_apps_clk>,

			<&clock_gcc clk_gcc_blsp2_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp2_uart1_sleep>;

		pinctrl-1 = <&blsp2_uart1_active>;



		qcom,msm-bus,name = "buart7";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<86 512 0 0>,

				<86 512 500 800>;

	};



	spi@7575000 { /* BLSP1 QUP1 - SPI1 */

		pinctrl-0 = <&spi_0_active &spi_0_cs0_active &spi_0_cs1_active>;

		pinctrl-1 = <&spi_0_sleep &spi_0_cs0_sleep &spi_0_cs1_sleep>;

		status = "disabled";

	};



	spi@75B8000 { /* BLSP2 QUP4 - SPI10 */

		status = "disabled";

	};



	spi@75BA000 { /* BLSP2 QUP6 */

		status = "disabled";

	};

};

arch/arm/boot/dts/qcom/apq8096-drone.dtsi

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arch/arm/boot/dts/qcom/apq8096-v3-drone.dts

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/* Copyright (c) 2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */





/dts-v1/;



#include "apq8096-v3.dtsi"

#include "apq8096-drone.dtsi"



/ {

	model = "Qualcomm Technologies, Inc. APQ8096v3 + PM8996&PMI8996 Drone";

	compatible = "qcom,apq8096-mtp", "qcom,msm8996",

			"qcom,apq8096";

	qcom,msm-id = <246 0x30000>, <291 0x30000>,

			<246 0x30001>, <291 0x30001>;

	qcom,board-id = <8 3>;

};



&spi_9 {

	status = "ok";

};