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Commit 5094b92f authored by Russell King's avatar Russell King
Browse files

ARM: sa1100: convert sched_clock() to use new infrastructure



Convert sa1100 to use the new sched_clock() infrastructure for extending
32bit counters to full 64-bit nanoseconds.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 7ce83018
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+1 −0
Original line number Diff line number Diff line
@@ -642,6 +642,7 @@ config ARCH_SA1100
	select CPU_FREQ
	select GENERIC_CLOCKEVENTS
	select HAVE_CLK
	select HAVE_SCHED_CLOCK
	select TICK_ONESHOT
	select ARCH_REQUIRE_GPIOLIB
	help
+0 −23
Original line number Diff line number Diff line
@@ -16,9 +16,7 @@
#include <linux/pm.h>
#include <linux/cpufreq.h>
#include <linux/ioport.h>
#include <linux/sched.h>	/* just for sched_clock() - funny that */
#include <linux/platform_device.h>
#include <linux/cnt32_to_63.h>

#include <asm/div64.h>
#include <mach/hardware.h>
@@ -109,27 +107,6 @@ unsigned int sa11x0_getspeed(unsigned int cpu)
	return cclk_frequency_100khz[PPCR & 0xf] * 100;
}

/*
 * This is the SA11x0 sched_clock implementation.  This has
 * a resolution of 271ns, and a maximum value of 32025597s (370 days).
 *
 * The return value is guaranteed to be monotonic in that range as
 * long as there is always less than 582 seconds between successive
 * calls to this function.
 *
 *  ( * 1E9 / 3686400 => * 78125 / 288)
 */
unsigned long long notrace sched_clock(void)
{
	unsigned long long v = cnt32_to_63(OSCR);

	/* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
	v *= 78125<<1;
	do_div(v, 288<<1);

	return v;
}

/*
 * Default power-off for SA1100
 */
+30 −0
Original line number Diff line number Diff line
@@ -12,12 +12,39 @@
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/sched.h>	/* just for sched_clock() - funny that */
#include <linux/timex.h>
#include <linux/clockchips.h>

#include <asm/mach/time.h>
#include <asm/sched_clock.h>
#include <mach/hardware.h>

/*
 * This is the SA11x0 sched_clock implementation.
 */
static DEFINE_CLOCK_DATA(cd);

/*
 * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
 * NSEC_PER_SEC, 60).
 * This gives a resolution of about 271ns and a wrap period of about 19min.
 */
#define SC_MULT		2275555556u
#define SC_SHIFT	23

unsigned long long notrace sched_clock(void)
{
	u32 cyc = OSCR;
	return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
}

static void notrace sa1100_update_sched_clock(void)
{
	u32 cyc = OSCR;
	update_sched_clock(&cd, cyc, (u32)~0);
}

#define MIN_OSCR_DELTA 2

static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
@@ -96,6 +123,9 @@ static void __init sa1100_timer_init(void)
	OIER = 0;		/* disable any timer interrupts */
	OSSR = 0xf;		/* clear status on all timers */

	init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
			       3686400, SC_MULT, SC_SHIFT);

	ckevt_sa1100_osmr0.mult =
		div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);
	ckevt_sa1100_osmr0.max_delta_ns =