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Commit 50701588 authored by Viresh Kumar's avatar Viresh Kumar Committed by Rafael J. Wysocki
Browse files

cpufreq: rename index as driver_data in cpufreq_frequency_table 



The "index" field of struct cpufreq_frequency_table was never an
index and isn't used at all by the cpufreq core.  It only is useful
for cpufreq drivers for their internal purposes.

Many people nowadays blindly set it in ascending order with the
assumption that the core will use it, which is a mistake.

Rename it to "driver_data" as that's what its purpose is. All of its
users are updated accordingly.

[rjw: Changelog]
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Acked-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 2361be23

Documentation/cpu-freq/cpu-drivers.txt

+2 −8
Original line number Diff line number Diff line
@@ -186,7 +186,7 @@ As most cpufreq processors only allow for being set to a few specific 
frequencies, a "frequency table" with some functions might assist in

some work of the processor driver. Such a "frequency table" consists

of an array of struct cpufreq_frequency_table entries, with any value in

"index" you want to use, and the corresponding frequency in

"driver_data" you want to use, and the corresponding frequency in

"frequency". At the end of the table, you need to add a

cpufreq_frequency_table entry with frequency set to CPUFREQ_TABLE_END. And

if you want to skip one entry in the table, set the frequency to
@@ -214,10 +214,4 @@ int cpufreq_frequency_table_target(struct cpufreq_policy *policy, 
is the corresponding frequency table helper for the ->target

stage. Just pass the values to this function, and the unsigned int

index returns the number of the frequency table entry which contains

the frequency the CPU shall be set to. PLEASE NOTE: This is not the

"index" which is in this cpufreq_table_entry.index, but instead

cpufreq_table[index]. So, the new frequency is

cpufreq_table[index].frequency, and the value you stored into the

frequency table "index" field is

cpufreq_table[index].index.

the frequency the CPU shall be set to.

arch/arm/mach-davinci/da850.c

+4 −4
Original line number Diff line number Diff line
@@ -1004,7 +1004,7 @@ static const struct da850_opp da850_opp_96 = { 


#define OPP(freq) 		\

	{				\

		.index = (unsigned int) &da850_opp_##freq,	\

		.driver_data = (unsigned int) &da850_opp_##freq,	\

		.frequency = freq * 1000, \

	}
@@ -1016,7 +1016,7 @@ static struct cpufreq_frequency_table da850_freq_table[] = { 
	OPP(200),

	OPP(96),

	{

		.index		= 0,

		.driver_data		= 0,

		.frequency	= CPUFREQ_TABLE_END,

	},

};
@@ -1044,7 +1044,7 @@ static int da850_set_voltage(unsigned int index) 
	if (!cvdd)

		return -ENODEV;



	opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;

	opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;



	return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max);

}
@@ -1125,7 +1125,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) 
	struct pll_data *pll = clk->pll_data;

	int ret;



	opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;

	opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;

	prediv = opp->prediv;

	mult = opp->mult;

	postdiv = opp->postdiv;

arch/arm/mach-s3c24xx/cpufreq-utils.c

+1 −1
Original line number Diff line number Diff line
@@ -60,5 +60,5 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) 
 */

void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)

{

	__raw_writel(cfg->pll.index, S3C2410_MPLLCON);

	__raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON);

}

arch/arm/mach-s3c24xx/cpufreq.c

+2 −2
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@ static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg) 
	cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);

	cfg->freq.armclk = armclk = clk_get_rate(clk_arm);



	cfg->pll.index = __raw_readl(S3C2410_MPLLCON);

	cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON);

	cfg->pll.frequency = fclk;



	cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
@@ -431,7 +431,7 @@ static unsigned int suspend_freq; 
static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)

{

	suspend_pll.frequency = clk_get_rate(_clk_mpll);

	suspend_pll.index = __raw_readl(S3C2410_MPLLCON);

	suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON);

	suspend_freq = s3c_cpufreq_get(0) * 1000;



	return 0;

arch/arm/mach-s3c24xx/pll-s3c2410.c

+27 −27
Original line number Diff line number Diff line
@@ -33,36 +33,36 @@ 
#include <plat/cpu-freq-core.h>



static struct cpufreq_frequency_table pll_vals_12MHz[] = {

    { .frequency = 34000000,  .index = PLLVAL(82, 2, 3),   },

    { .frequency = 45000000,  .index = PLLVAL(82, 1, 3),   },

    { .frequency = 51000000,  .index = PLLVAL(161, 3, 3),  },

    { .frequency = 48000000,  .index = PLLVAL(120, 2, 3),  },

    { .frequency = 56000000,  .index = PLLVAL(142, 2, 3),  },

    { .frequency = 68000000,  .index = PLLVAL(82, 2, 2),   },

    { .frequency = 79000000,  .index = PLLVAL(71, 1, 2),   },

    { .frequency = 85000000,  .index = PLLVAL(105, 2, 2),  },

    { .frequency = 90000000,  .index = PLLVAL(112, 2, 2),  },

    { .frequency = 101000000, .index = PLLVAL(127, 2, 2),  },

    { .frequency = 113000000, .index = PLLVAL(105, 1, 2),  },

    { .frequency = 118000000, .index = PLLVAL(150, 2, 2),  },

    { .frequency = 124000000, .index = PLLVAL(116, 1, 2),  },

    { .frequency = 135000000, .index = PLLVAL(82, 2, 1),   },

    { .frequency = 147000000, .index = PLLVAL(90, 2, 1),   },

    { .frequency = 152000000, .index = PLLVAL(68, 1, 1),   },

    { .frequency = 158000000, .index = PLLVAL(71, 1, 1),   },

    { .frequency = 170000000, .index = PLLVAL(77, 1, 1),   },

    { .frequency = 180000000, .index = PLLVAL(82, 1, 1),   },

    { .frequency = 186000000, .index = PLLVAL(85, 1, 1),   },

    { .frequency = 192000000, .index = PLLVAL(88, 1, 1),   },

    { .frequency = 203000000, .index = PLLVAL(161, 3, 1),  },

    { .frequency = 34000000,  .driver_data = PLLVAL(82, 2, 3),   },

    { .frequency = 45000000,  .driver_data = PLLVAL(82, 1, 3),   },

    { .frequency = 51000000,  .driver_data = PLLVAL(161, 3, 3),  },

    { .frequency = 48000000,  .driver_data = PLLVAL(120, 2, 3),  },

    { .frequency = 56000000,  .driver_data = PLLVAL(142, 2, 3),  },

    { .frequency = 68000000,  .driver_data = PLLVAL(82, 2, 2),   },

    { .frequency = 79000000,  .driver_data = PLLVAL(71, 1, 2),   },

    { .frequency = 85000000,  .driver_data = PLLVAL(105, 2, 2),  },

    { .frequency = 90000000,  .driver_data = PLLVAL(112, 2, 2),  },

    { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2),  },

    { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2),  },

    { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2),  },

    { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2),  },

    { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1),   },

    { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1),   },

    { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1),   },

    { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1),   },

    { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1),   },

    { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1),   },

    { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1),   },

    { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1),   },

    { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1),  },



    /* 2410A extras */



    { .frequency = 210000000, .index = PLLVAL(132, 2, 1),  },

    { .frequency = 226000000, .index = PLLVAL(105, 1, 1),  },

    { .frequency = 266000000, .index = PLLVAL(125, 1, 1),  },

    { .frequency = 268000000, .index = PLLVAL(126, 1, 1),  },

    { .frequency = 270000000, .index = PLLVAL(127, 1, 1),  },

    { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1),  },

    { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1),  },

    { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1),  },

    { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1),  },

    { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1),  },

};



static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)