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Commit 503ab0e9 authored by Hanumath Prasad's avatar Hanumath Prasad
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ARM: dts: msm: Set minimum CPUBW based on CPU freq for MSM8937 



This allows setting a DDR frequency floor based on CPU frequency is
addition to using the bw_hwmon governor for decide the final CPU BW
vote. Because of how the BW votes are aggregated, if bw_hwmon pick a lower
vote than the floor, the final vote will be the floor value.

Change-Id: I19e601d7be5fda40dc32b6bd758cbcbe20058ce3
Signed-off-by: default avatarHanumath Prasad <hpprasad@codeaurora.org>
parent 2be5ff68

arch/arm/boot/dts/qcom/msm8937.dtsi

+28 −0
Original line number Diff line number Diff line
@@ -735,6 +735,24 @@ 
		qcom,target-dev = <&cpubw>;

	};



	mincpubw: qcom,mincpubw {

		compatible = "qcom,devbw";

		governor = "cpufreq";

		qcom,src-dst-ports = <1 512>;

		qcom,active-only;

		qcom,bw-tbl =

			<   769 /*  100.8 MHz */ >,

			<  1611 /*  211.2 MHz */ >,

			<  2124 /*  278.4 MHz */ >,

			<  2929 /*  384   MHz */ >,	/* SVS	*/

			<  4101 /*  537.6 MHz */ >,

			<  4248 /*  556.8 MHz */ >,

			<  5053 /*  662.4 MHz */ >,	/* SVS+	 */

			<  5712 /*  748.8 MHz */ >,     /* NOM   */

			<  6152 /*  806.4 MHz */ >,     /* NOM+  */

			<  7031 /*  921.6 MHz */ >;     /* TURBO */

	};



	devfreq-cpufreq {

		cpubw-cpufreq {

		target-dev = <&cpubw>;
@@ -765,6 +783,16 @@ 
			<  998400  533333 >,	/* NOM+  */

			< 1094400  533333 >;	/* TURBO */

		};



		mincpubw-cpufreq {

			target-dev = <&mincpubw>;

			cpu-to-dev-map-0 =

				< 1094400 2929 >,

				< 1401000 4248 >;

			cpu-to-dev-map-4 =

				<  998400 2929 >,

				< 1094400 4248 >;

		};

	};



	blsp2_uart1: uart@7aef000 {