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Commit 4f3b362e authored by Venkata Narendra Kumar Gutta's avatar Venkata Narendra Kumar Gutta
Browse files

ASoC: msm8x16-wcd: Add support to enable compander GPIO



Gain of the compander on HPH path is routed through GPIO. Add support
to configure compander GPIO to support this and also update rx bias
default register value.

CRs-Fixed: 965449
Change-Id: I159bf4d53947bb43e6adc9622783c7363eea6052
Signed-off-by: default avatarVenkata Narendra Kumar Gutta <vgutta@codeaurora.org>
parent 626c9e9a
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+17 −0
Original line number Diff line number Diff line
@@ -453,6 +453,15 @@ void msm8x16_wcd_spk_ext_pa_cb(
	msm8x16_wcd->codec_spk_ext_pa_cb = codec_spk_ext_pa;
}

void msm8x16_wcd_hph_comp_cb(
	int (*codec_hph_comp_gpio)(bool enable), struct snd_soc_codec *codec)
{
	struct msm8x16_wcd_priv *msm8x16_wcd = snd_soc_codec_get_drvdata(codec);

	pr_debug("%s: Enter\n", __func__);
	msm8x16_wcd->codec_hph_comp_gpio = codec_hph_comp_gpio;
}

static void msm8x16_wcd_compute_impedance(struct snd_soc_codec *codec, s16 l,
				s16 r, uint32_t *zl, uint32_t *zr, bool high)
{
@@ -3851,7 +3860,15 @@ static int msm8x16_wcd_codec_config_compander(struct snd_soc_codec *codec,
				MSM8X16_WCD_A_CDC_COMP0_B3_CTL, 0xFF, 0x28);
			snd_soc_update_bits(codec,
				MSM8X16_WCD_A_CDC_COMP0_B2_CTL, 0xF0, 0xB0);

			/* Enable Compander GPIO */
			if (msm8x16_wcd->codec_hph_comp_gpio)
				msm8x16_wcd->codec_hph_comp_gpio(1);
		} else if (SND_SOC_DAPM_EVENT_OFF(event)) {
			/* Disable Compander GPIO */
			if (msm8x16_wcd->codec_hph_comp_gpio)
				msm8x16_wcd->codec_hph_comp_gpio(0);

			snd_soc_update_bits(codec,
				MSM8X16_WCD_A_CDC_COMP0_B2_CTL, 0x0F, 0x05);
			snd_soc_update_bits(codec,
+5 −0
Original line number Diff line number Diff line
@@ -315,6 +315,7 @@ struct msm8x16_wcd_priv {
	struct fw_info *fw_data;
	struct blocking_notifier_head notifier;
	int (*codec_spk_ext_pa_cb)(struct snd_soc_codec *codec, int enable);
	int (*codec_hph_comp_gpio)(bool enable);
	unsigned long status_mask;
	struct wcd_imped_i_ref imped_i_ref;
	enum wcd_mbhc_imp_det_pin imped_det_pin;
@@ -333,5 +334,9 @@ extern void msm8x16_update_int_spk_boost(bool enable);
extern void msm8x16_wcd_spk_ext_pa_cb(
		int (*codec_spk_ext_pa)(struct snd_soc_codec *codec,
		int enable), struct snd_soc_codec *codec);

extern void msm8x16_wcd_hph_comp_cb(
		int (*codec_hph_comp_gpio)(bool enable),
		struct snd_soc_codec *codec);
#endif
+1 −1
Original line number Diff line number Diff line
@@ -226,7 +226,7 @@
#define MSM8X16_WCD_A_ANALOG_RX_COM_OCP_COUNT		(0x192)
#define MSM8X16_WCD_A_ANALOG_RX_COM_OCP_COUNT__POR		(0x6E)
#define MSM8X16_WCD_A_ANALOG_RX_COM_BIAS_DAC		(0x193)
#define MSM8X16_WCD_A_ANALOG_RX_COM_BIAS_DAC__POR		(0x10)
#define MSM8X16_WCD_A_ANALOG_RX_COM_BIAS_DAC__POR		(0x18)
#define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_PA		(0x194)
#define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_PA__POR		(0x5A)
#define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_LDO_OCP	(0x195)