Loading arch/cris/arch-v10/mm/tlb.c +29 −29 Original line number Diff line number Diff line Loading @@ -4,7 +4,7 @@ * Low level TLB handling * * * Copyright (C) 2000-2002 Axis Communications AB * Copyright (C) 2000-2007 Axis Communications AB * * Authors: Bjorn Wesen (bjornw@axis.com) * Loading Loading @@ -39,7 +39,7 @@ flush_tlb_all(void) unsigned long flags; /* the vpn of i & 0xf is so we dont write similar TLB entries * in the same 4-way entry group. details.. * in the same 4-way entry group. details... */ local_irq_save(flags); Loading Loading @@ -96,9 +96,7 @@ flush_tlb_mm(struct mm_struct *mm) /* invalidate a single page */ void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) { struct mm_struct *mm = vma->vm_mm; int page_id = mm->context.page_id; Loading Loading @@ -172,12 +170,11 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) /* called in schedule() just before actually doing the switch_to */ void switch_mm(struct mm_struct *prev, struct mm_struct *next, void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { if (prev != next) { /* make sure we have a context */ get_mmu_context(next); /* remember the pgd for the fault handlers Loading @@ -191,8 +188,11 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, /* switch context in the MMU */ D(printk("switching mmu_context to %d (%p)\n", next->context, next)); D(printk(KERN_DEBUG "switching mmu_context to %d (%p)\n", next->context, next)); *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id); *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id); } } Loading
arch/cris/arch-v10/mm/tlb.c +29 −29 Original line number Diff line number Diff line Loading @@ -4,7 +4,7 @@ * Low level TLB handling * * * Copyright (C) 2000-2002 Axis Communications AB * Copyright (C) 2000-2007 Axis Communications AB * * Authors: Bjorn Wesen (bjornw@axis.com) * Loading Loading @@ -39,7 +39,7 @@ flush_tlb_all(void) unsigned long flags; /* the vpn of i & 0xf is so we dont write similar TLB entries * in the same 4-way entry group. details.. * in the same 4-way entry group. details... */ local_irq_save(flags); Loading Loading @@ -96,9 +96,7 @@ flush_tlb_mm(struct mm_struct *mm) /* invalidate a single page */ void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) { struct mm_struct *mm = vma->vm_mm; int page_id = mm->context.page_id; Loading Loading @@ -172,12 +170,11 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) /* called in schedule() just before actually doing the switch_to */ void switch_mm(struct mm_struct *prev, struct mm_struct *next, void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { if (prev != next) { /* make sure we have a context */ get_mmu_context(next); /* remember the pgd for the fault handlers Loading @@ -191,8 +188,11 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, /* switch context in the MMU */ D(printk("switching mmu_context to %d (%p)\n", next->context, next)); D(printk(KERN_DEBUG "switching mmu_context to %d (%p)\n", next->context, next)); *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id); *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id); } }