Merge "ARM: dts: msm: configure SPI node for msm8937" (4eee357d) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/msm8937-pinctrl.dtsi

+60 −0

Original line number	Diff line number	Diff line
		@@ -110,6 +110,66 @@
		};
		};

		spi3 {
		spi3_default: spi3_default {
		/* active state */
		mux {
		/* MOSI, MISO, CLK */
		pins = "gpio8", "gpio9", "gpio11";
		function = "blsp_spi3";
		};

		config {
		pins = "gpio8", "gpio9", "gpio11";
		drive-strength = <12>; /* 12 MA */
		bias-disable = <0>; /* No PULL */
		};
		};

		spi3_sleep: spi3_sleep {
		/* suspended state */
		mux {
		/* MOSI, MISO, CLK */
		pins = "gpio8", "gpio9", "gpio11";
		function = "gpio";
		};

		config {
		pins = "gpio8", "gpio9", "gpio11";
		drive-strength = <2>; /* 2 MA */
		bias-pull-down; /* PULL Down */
		};
		};

		spi3_cs0_active: cs0_active {
		/* CS */
		mux {
		pins = "gpio10";
		function = "blsp_spi3";
		};

		config {
		pins = "gpio10";
		drive-strength = <2>;
		bias-disable = <0>;
		};
		};

		spi3_cs0_sleep: cs0_sleep {
		/* CS */
		mux {
		pins = "gpio10";
		function = "gpio";
		};

		config {
		pins = "gpio10";
		drive-strength = <2>;
		bias-disable = <0>;
		};
		};
		};

		blsp2_uart1_active: blsp2_uart1_active {
		mux {
		pins = "gpio16", "gpio17", "gpio18", "gpio19";

+27 −0

Original line number	Diff line number	Diff line
		@@ -86,6 +86,7 @@
		smd36 = &smdtty_loopback;
		i2c2 = &i2c_2;
		i2c5 = &i2c_5;
		spi3 = &spi_3;
		};

		soc: soc { };
		@@ -314,6 +315,32 @@
		dma-names = "tx", "rx";
		};

		spi_3: spi@78b7000 { /* BLSP1 QUP3 */
		compatible = "qcom,spi-qup-v2";
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "spi_physical", "spi_bam_physical";
		reg = <0x78b7000 0x600>,
		<0x7884000 0x1f000>;
		interrupt-names = "spi_irq", "spi_bam_irq";
		interrupts = <0 97 0>, <0 238 0>;
		spi-max-frequency = <19200000>;
		pinctrl-names = "spi_default", "spi_sleep";
		pinctrl-0 = <&spi3_default &spi3_cs0_active>;
		pinctrl-1 = <&spi3_sleep &spi3_cs0_sleep>;
		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
		<&clock_gcc clk_gcc_blsp1_qup3_spi_apps_clk>;
		clock-names = "iface_clk", "core_clk";
		qcom,infinite-mode = <0>;
		qcom,use-bam;
		qcom,use-pinctrl;
		qcom,ver-reg-exists;
		qcom,bam-consumer-pipe-index = <8>;
		qcom,bam-producer-pipe-index = <9>;
		qcom,master-id = <86>;
		status = "disabled";
		};

		clock_gcc: qcom,gcc@1800000 {
		compatible = "qcom,gcc-8937";
		reg = <0x1800000 0x80000>,