Loading drivers/spi/spi-fsl-dspi.c +2 −2 Original line number Diff line number Diff line Loading @@ -46,7 +46,7 @@ #define SPI_TCR 0x08 #define SPI_CTAR(x) (0x0c + (x * 4)) #define SPI_CTAR(x) (0x0c + (((x) & 0x3) * 4)) #define SPI_CTAR_FMSZ(x) (((x) & 0x0000000f) << 27) #define SPI_CTAR_CPOL(x) ((x) << 26) #define SPI_CTAR_CPHA(x) ((x) << 25) Loading @@ -70,7 +70,7 @@ #define SPI_PUSHR 0x34 #define SPI_PUSHR_CONT (1 << 31) #define SPI_PUSHR_CTAS(x) (((x) & 0x00000007) << 28) #define SPI_PUSHR_CTAS(x) (((x) & 0x00000003) << 28) #define SPI_PUSHR_EOQ (1 << 27) #define SPI_PUSHR_CTCNT (1 << 26) #define SPI_PUSHR_PCS(x) (((1 << x) & 0x0000003f) << 16) Loading drivers/spi/spi-pxa2xx.c +5 −2 Original line number Diff line number Diff line Loading @@ -1274,6 +1274,8 @@ static int pxa2xx_spi_suspend(struct device *dev) if (status != 0) return status; write_SSCR0(0, drv_data->ioaddr); if (!pm_runtime_suspended(dev)) clk_disable_unprepare(ssp->clk); return 0; Loading @@ -1288,6 +1290,7 @@ static int pxa2xx_spi_resume(struct device *dev) pxa2xx_spi_dma_resume(drv_data); /* Enable the SSP clock */ if (!pm_runtime_suspended(dev)) clk_prepare_enable(ssp->clk); /* Restore LPSS private register bits */ Loading Loading
drivers/spi/spi-fsl-dspi.c +2 −2 Original line number Diff line number Diff line Loading @@ -46,7 +46,7 @@ #define SPI_TCR 0x08 #define SPI_CTAR(x) (0x0c + (x * 4)) #define SPI_CTAR(x) (0x0c + (((x) & 0x3) * 4)) #define SPI_CTAR_FMSZ(x) (((x) & 0x0000000f) << 27) #define SPI_CTAR_CPOL(x) ((x) << 26) #define SPI_CTAR_CPHA(x) ((x) << 25) Loading @@ -70,7 +70,7 @@ #define SPI_PUSHR 0x34 #define SPI_PUSHR_CONT (1 << 31) #define SPI_PUSHR_CTAS(x) (((x) & 0x00000007) << 28) #define SPI_PUSHR_CTAS(x) (((x) & 0x00000003) << 28) #define SPI_PUSHR_EOQ (1 << 27) #define SPI_PUSHR_CTCNT (1 << 26) #define SPI_PUSHR_PCS(x) (((1 << x) & 0x0000003f) << 16) Loading
drivers/spi/spi-pxa2xx.c +5 −2 Original line number Diff line number Diff line Loading @@ -1274,6 +1274,8 @@ static int pxa2xx_spi_suspend(struct device *dev) if (status != 0) return status; write_SSCR0(0, drv_data->ioaddr); if (!pm_runtime_suspended(dev)) clk_disable_unprepare(ssp->clk); return 0; Loading @@ -1288,6 +1290,7 @@ static int pxa2xx_spi_resume(struct device *dev) pxa2xx_spi_dma_resume(drv_data); /* Enable the SSP clock */ if (!pm_runtime_suspended(dev)) clk_prepare_enable(ssp->clk); /* Restore LPSS private register bits */ Loading