crypto: msm: qce50 driver multiple request enhancement

qce50 driver is enhanced to support multiple outstanding requests. The
ce_hw_support reports the maximum number of outstanding requests driver
can support. Sps interrupts are cut down. Under heavy traffic condition,
SPS_IOVEC_FLAG_INT is only set in producer pipe descriptor
for every MAX_BUNCH_MODE_REQ + 1 request to save interrupts.

This enhancement is only for crypto v5.3 or above. For platform with
older devices, the existing process is still maintained in the driver
to provide compatibility with old devices. The maximum number of
outstanding requests is reported as 1 then.

Previous get around code to retrieve the MAC_FAILED status bit from
crypto hardware status registser for CCM, is not going to work after
multi request support enhancement. Re-work the work around.
A dummy request is added at end of CCM decrypt. The MAC_FAILED status
can be retrieved from the result dump of dummy request.

qcrypto driver is changed to submit as many requests as possible, up
to maximum number of outstanding requests reported from low level crypto
driver.

Low level crypto driver internal statistics are added for debugging.

Change-Id: Ib66032a5a20db95be1b5beac0b0cb0d048416b43
Acked-by: Che-Min Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Kranthikumar Kurapati <kkurap@codeaurora.org>