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Commit 4d6ddfa9 authored Oct 29, 2005 by Hugh Dickins Committed by Linus Torvalds Oct 29, 2005

[PATCH] mm: tlb_is_full_mm was obscure

tlb_is_full_mm? What does that mean? The TLB is full? No, it means that the
mm's last user has gone and the whole mm is being torn down. And it's an
inline function because sparc64 uses a different (slightly better)
"tlb_frozen" name for the flag others call "fullmm".

And now the ptep_get_and_clear_full macro used in zap_pte_range refers
directly to tlb->fullmm, which would be wrong for sparc64. Rather than
correct that, I'd prefer to scrap tlb_is_full_mm altogether, and change
sparc64 to just use the same poor name as everyone else - is that okay?

Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

parent 15a23ffa

arch/sparc64/mm/tlb.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -72,7 +72,7 @@ void tlb_batch_add(struct mm_struct mm, unsigned long vaddr, pte_t ptep, pte_t

	no_cache_flush:		no_cache_flush:

	if (mp->tlb_frozen)		if (mp->fullmm)
	return;		return;

	nr = mp->tlb_nr;		nr = mp->tlb_nr;
	@@ -97,7 +97,7 @@ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long
	unsigned long nr = mp->tlb_nr;		unsigned long nr = mp->tlb_nr;
	long s = start, e = end, vpte_base;		long s = start, e = end, vpte_base;

	if (mp->tlb_frozen)		if (mp->fullmm)
	return;		return;

	/* If start is greater than end, that is a real problem. */		/* If start is greater than end, that is a real problem. */

include/asm-arm/tlb.h

+0 −5

Original line number	Original line	Diff line number	Diff line
	@@ -68,11 +68,6 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
	put_cpu_var(mmu_gathers);		put_cpu_var(mmu_gathers);
	}		}

	static inline unsigned int tlb_is_full_mm(struct mmu_gather *tlb)
	{
	return tlb->fullmm;
	}

	#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0)		#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0)

	/*		/*

include/asm-arm26/tlb.h

+0 −7

Original line number	Original line	Diff line number	Diff line
	@@ -55,13 +55,6 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
	put_cpu_var(mmu_gathers);		put_cpu_var(mmu_gathers);
	}		}


	static inline unsigned int
	tlb_is_full_mm(struct mmu_gather *tlb)
	{
	return tlb->fullmm;
	}

	#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0)		#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0)
	//#define tlb_start_vma(tlb,vma) do { } while (0)		//#define tlb_start_vma(tlb,vma) do { } while (0)
	//FIXME - ARM32 uses this now that things changed in the kernel. seems like it may be pointless on arm26, however to get things compiling...		//FIXME - ARM32 uses this now that things changed in the kernel. seems like it may be pointless on arm26, however to get things compiling...

include/asm-generic/tlb.h

+0 −6

Original line number	Original line	Diff line number	Diff line
	@@ -103,12 +103,6 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
	put_cpu_var(mmu_gathers);		put_cpu_var(mmu_gathers);
	}		}

	static inline unsigned int
	tlb_is_full_mm(struct mmu_gather *tlb)
	{
	return tlb->fullmm;
	}

	/* tlb_remove_page		/* tlb_remove_page
	* Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)), while		* Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)), while
	* handling the additional races in SMP caused by other CPUs caching valid		* handling the additional races in SMP caused by other CPUs caching valid

include/asm-ia64/tlb.h

+0 −6

Original line number	Original line	Diff line number	Diff line
	@@ -178,12 +178,6 @@ tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
	put_cpu_var(mmu_gathers);		put_cpu_var(mmu_gathers);
	}		}

	static inline unsigned int
	tlb_is_full_mm(struct mmu_gather *tlb)
	{
	return tlb->fullmm;
	}

	/*		/*
	* Logically, this routine frees PAGE. On MP machines, the actual freeing of the page		* Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
	* must be delayed until after the TLB has been flushed (see comments at the beginning of		* must be delayed until after the TLB has been flushed (see comments at the beginning of