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Commit 4cb38750 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86/mm changes from Peter Anvin:
 "The big change here is the patchset by Alex Shi to use INVLPG to flush
  only the affected pages when we only need to flush a small page range.

  It also removes the special INVALIDATE_TLB_VECTOR interrupts (32
  vectors!) and replace it with an ordinary IPI function call."

Fix up trivial conflicts in arch/x86/include/asm/apic.h (added code next
to changed line)

* 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/tlb: Fix build warning and crash when building for !SMP
  x86/tlb: do flush_tlb_kernel_range by 'invlpg'
  x86/tlb: replace INVALIDATE_TLB_VECTOR by CALL_FUNCTION_VECTOR
  x86/tlb: enable tlb flush range support for x86
  mm/mmu_gather: enable tlb flush range in generic mmu_gather
  x86/tlb: add tlb_flushall_shift knob into debugfs
  x86/tlb: add tlb_flushall_shift for specific CPU
  x86/tlb: fall back to flush all when meet a THP large page
  x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
  x86/tlb_info: get last level TLB entry number of CPU
  x86: Add read_mostly declaration/definition to variables from smp.h
  x86: Define early read-mostly per-cpu macros
parents 0a2fe19c 7efa1c87

arch/x86/Kconfig.debug

+19 −0
Original line number Diff line number Diff line
@@ -129,6 +129,25 @@ config DOUBLEFAULT 
	  option saves about 4k and might cause you much additional grey

	  hair.



config DEBUG_TLBFLUSH

	bool "Set upper limit of TLB entries to flush one-by-one"

	depends on DEBUG_KERNEL && (X86_64 || X86_INVLPG)

	---help---



	X86-only for now.



	This option allows the user to tune the amount of TLB entries the

	kernel flushes one-by-one instead of doing a full TLB flush. In

	certain situations, the former is cheaper. This is controlled by the

	tlb_flushall_shift knob under /sys/kernel/debug/x86. If you set it

	to -1, the code flushes the whole TLB unconditionally. Otherwise,

	for positive values of it, the kernel will use single TLB entry

	invalidating instructions according to the following formula:



	flush_entries <= active_tlb_entries / 2^tlb_flushall_shift



	If in doubt, say "N".



config IOMMU_DEBUG

	bool "Enable IOMMU debugging"

	depends on GART_IOMMU && DEBUG_KERNEL

arch/x86/include/asm/apic.h

+1 −1
Original line number Diff line number Diff line
@@ -546,7 +546,7 @@ static inline const struct cpumask *online_target_cpus(void) 
	return cpu_online_mask;

}



DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);

DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);





static inline unsigned int read_apic_id(void)

arch/x86/include/asm/entry_arch.h

+0 −9
Original line number Diff line number Diff line
@@ -15,15 +15,6 @@ BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) 
BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)

BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)

BUILD_INTERRUPT(reboot_interrupt,REBOOT_VECTOR)



.irp idx,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15, \

	16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31

.if NUM_INVALIDATE_TLB_VECTORS > \idx

BUILD_INTERRUPT3(invalidate_interrupt\idx,

		 (INVALIDATE_TLB_VECTOR_START)+\idx,

		 smp_invalidate_interrupt)

.endif

.endr

#endif



BUILD_INTERRUPT(x86_platform_ipi, X86_PLATFORM_IPI_VECTOR)

arch/x86/include/asm/irq_vectors.h

+0 −11
Original line number Diff line number Diff line
@@ -119,17 +119,6 @@ 
 */

#define LOCAL_TIMER_VECTOR		0xef



/* up to 32 vectors used for spreading out TLB flushes: */

#if NR_CPUS <= 32

# define NUM_INVALIDATE_TLB_VECTORS	(NR_CPUS)

#else

# define NUM_INVALIDATE_TLB_VECTORS	(32)

#endif



#define INVALIDATE_TLB_VECTOR_END	(0xee)

#define INVALIDATE_TLB_VECTOR_START	\

	(INVALIDATE_TLB_VECTOR_END-NUM_INVALIDATE_TLB_VECTORS+1)



#define NR_VECTORS			 256



#define FPU_IRQ				  13

arch/x86/include/asm/paravirt.h

+3 −2
Original line number Diff line number Diff line
@@ -360,9 +360,10 @@ static inline void __flush_tlb_single(unsigned long addr) 


static inline void flush_tlb_others(const struct cpumask *cpumask,

				    struct mm_struct *mm,

				    unsigned long va)

				    unsigned long start,

				    unsigned long end)

{

	PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);

	PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);

}



static inline int paravirt_pgd_alloc(struct mm_struct *mm)