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Commit 4c445e0e authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Rename primary_disabled to primary_enabled 



Let's try to avoid these confusing negated booleans.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e5b611fd

drivers/gpu/drm/i915/intel_display.c

+5 −5
Original line number Diff line number Diff line
@@ -1840,9 +1840,9 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv, 
	/* If the pipe isn't enabled, we can't pump pixels and may hang */

	assert_pipe_enabled(dev_priv, pipe);



	WARN(!intel_crtc->primary_disabled, "Primary plane already enabled\n");

	WARN(intel_crtc->primary_enabled, "Primary plane already enabled\n");



	intel_crtc->primary_disabled = false;

	intel_crtc->primary_enabled = true;



	reg = DSPCNTR(plane);

	val = I915_READ(reg);
@@ -1870,9 +1870,9 @@ static void intel_disable_primary_plane(struct drm_i915_private *dev_priv, 
	int reg;

	u32 val;



	WARN(intel_crtc->primary_disabled, "Primary plane already disabled\n");

	WARN(!intel_crtc->primary_enabled, "Primary plane already disabled\n");



	intel_crtc->primary_disabled = true;

	intel_crtc->primary_enabled = false;



	reg = DSPCNTR(plane);

	val = I915_READ(reg);
@@ -10706,7 +10706,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) 
								 &crtc->config);



		crtc->base.enabled = crtc->active;

		crtc->primary_disabled = !crtc->active;

		crtc->primary_enabled = crtc->active;



		DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n",

			      crtc->base.base.id,

drivers/gpu/drm/i915/intel_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -321,7 +321,7 @@ struct intel_crtc { 
	 */

	bool active;

	bool eld_vld;

	bool primary_disabled; /* is the crtc obscured by a plane? */

	bool primary_enabled; /* is the primary plane (partially) visible? */

	bool lowfreq_avail;

	struct intel_overlay *overlay;

	struct intel_unpin_work *unpin_work;

drivers/gpu/drm/i915/intel_pm.c

+1 −1
Original line number Diff line number Diff line
@@ -475,7 +475,7 @@ void intel_update_fbc(struct drm_device *dev) 
	 */

	list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {

		if (intel_crtc_active(tmp_crtc) &&

		    !to_intel_crtc(tmp_crtc)->primary_disabled) {

		    to_intel_crtc(tmp_crtc)->primary_enabled) {

			if (crtc) {

				if (set_no_fbc_reason(dev_priv, FBC_MULTIPLE_PIPES))

					DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");

drivers/gpu/drm/i915/intel_sprite.c

+4 −4
Original line number Diff line number Diff line
@@ -521,10 +521,10 @@ intel_enable_primary(struct drm_crtc *crtc) 
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int reg = DSPCNTR(intel_crtc->plane);



	if (!intel_crtc->primary_disabled)

	if (intel_crtc->primary_enabled)

		return;



	intel_crtc->primary_disabled = false;

	intel_crtc->primary_enabled = true;



	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);

	intel_flush_primary_plane(dev_priv, intel_crtc->plane);
@@ -553,10 +553,10 @@ intel_disable_primary(struct drm_crtc *crtc) 
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int reg = DSPCNTR(intel_crtc->plane);



	if (intel_crtc->primary_disabled)

	if (!intel_crtc->primary_enabled)

		return;



	intel_crtc->primary_disabled = true;

	intel_crtc->primary_enabled = false;



	mutex_lock(&dev->struct_mutex);

	if (dev_priv->fbc.plane == intel_crtc->plane)