Merge "defconfig: arm64: msm: enable IOMMU unit test in the perf defconfig" (4c06d0df) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm64/configs/msm-perf_defconfig

+2 −0

Original line number	Diff line number	Diff line
		@@ -467,6 +467,8 @@ CONFIG_MSM_CLK_CONTROLLER_V2=y
		CONFIG_MSM_MDSS_PLL=y
		CONFIG_REMOTE_SPINLOCK_MSM=y
		CONFIG_ARM_SMMU=y
		CONFIG_IOMMU_DEBUG=y
		CONFIG_IOMMU_TESTS=y
		CONFIG_PWM=y
		CONFIG_PWM_QPNP=y
		CONFIG_CORESIGHT=y

arch/arm64/configs/msm_defconfig

+3 −0

Original line number	Diff line number	Diff line
		@@ -478,6 +478,9 @@ CONFIG_MSM_CLK_CONTROLLER_V2=y
		CONFIG_MSM_MDSS_PLL=y
		CONFIG_REMOTE_SPINLOCK_MSM=y
		CONFIG_ARM_SMMU=y
		CONFIG_IOMMU_DEBUG=y
		CONFIG_IOMMU_DEBUG_TRACKING=y
		CONFIG_IOMMU_TESTS=y
		CONFIG_PWM=y
		CONFIG_PWM_QPNP=y
		CONFIG_CORESIGHT=y

drivers/iommu/Kconfig

+30 −0

Original line number	Diff line number	Diff line
		@@ -406,4 +406,34 @@ config ARM_SMMU
		Say Y here if your SoC includes an IOMMU device implementing
		the ARM SMMU architecture.

		menuconfig IOMMU_DEBUG
		bool "IOMMU Profiling and Debugging"
		help
		Makes available some additional IOMMU profiling and debugging
		options.

		if IOMMU_DEBUG

		config IOMMU_DEBUG_TRACKING
		bool "Track key IOMMU events"
		select IOMMU_API
		help
		Enables additional debug tracking in the IOMMU framework code.
		Tracking information and tests can be accessed through various
		debugfs files.

		Say Y here if you need to debug IOMMU issues and are okay with
		the performance penalty of the tracking.

		config IOMMU_TESTS
		bool "Interactive IOMMU performance/functional tests"
		select IOMMU_API
		help
		Enables a suite of IOMMU unit tests. The tests are runnable
		through debugfs. Unlike the IOMMU_DEBUG_TRACKING option, the
		impact of enabling this option to overal system performance
		should be minimal.

		endif # IOMMU_DEBUG

		endif # IOMMU_SUPPORT

drivers/iommu/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@ obj-$(CONFIG_IOMMU_API) += msm_dma_iommu_mapping.o
		obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o
		obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o
		obj-$(CONFIG_OF_IOMMU) += of_iommu.o
		obj-$(CONFIG_IOMMU_DEBUG) += iommu-debug.o
		obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o msm_iommu_domains.o msm_iommu_mapping.o
		obj-$(CONFIG_MSM_IOMMU_V1) += msm_iommu-v1.o msm_iommu_dev-v1.o msm_iommu_sec.o
		obj-$(CONFIG_MSM_IOMMU_PMON) += msm_iommu_perfmon.o msm_iommu_perfmon-v1.o

drivers/iommu/arm-smmu.c

+11 −9

Original line number	Diff line number	Diff line
		@@ -381,6 +381,7 @@ struct arm_smmu_device {

		struct regulator *gdsc;

		/* Protects against domains attaching to the same SMMU concurrently */
		struct mutex attach_lock;
		unsigned int attach_count;

		@@ -1538,12 +1539,14 @@ static int arm_smmu_attach_dev(struct iommu_domain domain, struct device dev)
		return -ENXIO;
		}

		mutex_lock(&smmu->attach_lock);
		if (dev->archdata.iommu) {
		dev_err(dev, "already attached to IOMMU domain\n");
		mutex_unlock(&smmu->attach_lock);
		mutex_unlock(&smmu_domain->init_mutex);
		return -EEXIST;
		}

		mutex_lock(&smmu->attach_lock);
		if (!smmu->attach_count++) {
		/*
		* We need an extra power vote if we can't retain register
		@@ -1563,7 +1566,6 @@ static int arm_smmu_attach_dev(struct iommu_domain domain, struct device dev)
		} else {
		arm_smmu_enable_clocks(smmu);
		}
		mutex_unlock(&smmu->attach_lock);

		/* Ensure that the domain is finalised */
		ret = arm_smmu_init_domain_context(domain, smmu);
		@@ -1603,6 +1605,7 @@ static int arm_smmu_attach_dev(struct iommu_domain domain, struct device dev)
		goto err_destroy_domain_context;
		dev->archdata.iommu = domain;
		arm_smmu_disable_clocks(smmu);
		mutex_unlock(&smmu->attach_lock);
		mutex_unlock(&smmu_domain->init_mutex);
		return ret;

		@@ -1610,12 +1613,11 @@ err_destroy_domain_context:
		arm_smmu_destroy_domain_context(domain);
		err_disable_clocks:
		arm_smmu_disable_clocks(smmu);
		mutex_unlock(&smmu_domain->init_mutex);
		mutex_lock(&smmu->attach_lock);
		if (!--smmu->attach_count &&
		(!(smmu->options & ARM_SMMU_OPT_REGISTER_SAVE) \|\| atomic_ctx))
		arm_smmu_disable_regulators(smmu);
		mutex_unlock(&smmu->attach_lock);
		mutex_unlock(&smmu_domain->init_mutex);
		return ret;
		}

		@@ -1647,18 +1649,18 @@ static void arm_smmu_detach_dev(struct iommu_domain domain, struct device dev)
		return;
		}

		mutex_lock(&smmu->attach_lock);

		cfg = find_smmu_master_cfg(dev);
		if (!cfg) {
		mutex_unlock(&smmu_domain->init_mutex);
		return;
		}
		if (!cfg)
		goto unlock;

		dev->archdata.iommu = NULL;
		arm_smmu_domain_remove_master(smmu_domain, cfg);
		arm_smmu_destroy_domain_context(domain);
		mutex_lock(&smmu->attach_lock);
		if (!--smmu->attach_count)
		arm_smmu_power_off(smmu, atomic_ctx);
		unlock:
		mutex_unlock(&smmu->attach_lock);
		mutex_unlock(&smmu_domain->init_mutex);
		}