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Commit 4bf23520 authored by Matt Wagantall's avatar Matt Wagantall
Browse files

Merge tag 'v3.18.4' into msm-3.18



This is the 3.18.4 stable release

Resolve a handful of context conflicts with local
changes as part of the merge resolution.

Conflicts:
	drivers/clk/clk.c
	drivers/usb/dwc3/gadget.c

Change-Id: If8d51b6705b35d9bb279add784af7c32984c28c4
Signed-off-by: default avatarMatt Wagantall <mattw@codeaurora.org>
parents ae6e9ed0 71745ce1
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+1 −0
Original line number Diff line number Diff line
@@ -1280,6 +1280,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
	i8042.notimeout	[HW] Ignore timeout condition signalled by controller
	i8042.reset	[HW] Reset the controller during init and cleanup
	i8042.unlock	[HW] Unlock (ignore) the keylock
	i8042.kbdreset  [HW] Reset device connected to KBD port

	i810=		[HW,DRM]

+1 −1
Original line number Diff line number Diff line
VERSION = 3
PATCHLEVEL = 18
SUBLEVEL = 3
SUBLEVEL = 4
EXTRAVERSION =
NAME = Shuffling Zombie Juror

+9 −9
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@
		/* this is for console on PGU */
		/* bootargs = "console=tty0 consoleblank=0"; */
		/* this is for console on serial */
		bootargs = "earlycon=uart8250,mmio32,0xc0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug";
		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug";
	};

	aliases {
@@ -41,9 +41,9 @@
			#interrupt-cells = <1>;
		};

		uart0: serial@c0000000 {
		uart0: serial@f0000000 {
			compatible = "ns8250";
			reg = <0xc0000000 0x2000>;
			reg = <0xf0000000 0x2000>;
			interrupts = <11>;
			clock-frequency = <3686400>;
			baud = <115200>;
@@ -52,21 +52,21 @@
			no-loopback-test = <1>;
		};

		pgu0: pgu@c9000000 {
		pgu0: pgu@f9000000 {
			compatible = "snps,arcpgufb";
			reg = <0xc9000000 0x400>;
			reg = <0xf9000000 0x400>;
		};

		ps2: ps2@c9001000 {
		ps2: ps2@f9001000 {
			compatible = "snps,arc_ps2";
			reg = <0xc9000400 0x14>;
			reg = <0xf9000400 0x14>;
			interrupts = <13>;
			interrupt-names = "arc_ps2_irq";
		};

		eth0: ethernet@c0003000 {
		eth0: ethernet@f0003000 {
			compatible = "snps,oscilan";
			reg = <0xc0003000 0x44>;
			reg = <0xf0003000 0x44>;
			interrupts = <7>, <8>;
			interrupt-names = "rx", "tx";
		};
+2 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@
};

&sdhci2 {
	broken-cd;
	bus-width = <8>;
	non-removable;
	status = "okay";
};
+32 −31
Original line number Diff line number Diff line
@@ -83,7 +83,8 @@
			compatible = "mrvl,pxav3-mmc";
			reg = <0xab1000 0x200>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&chip CLKID_SDIO1XIN>;
			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
			clock-names = "io", "core";
			status = "disabled";
		};

@@ -314,36 +315,6 @@
				interrupt-parent = <&gic>;
				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
			};

			gpio4: gpio@5000 {
				compatible = "snps,dw-apb-gpio";
				reg = <0x5000 0x400>;
				#address-cells = <1>;
				#size-cells = <0>;

				porte: gpio-port@4 {
					compatible = "snps,dw-apb-gpio-port";
					gpio-controller;
					#gpio-cells = <2>;
					snps,nr-gpios = <32>;
					reg = <0>;
				};
			};

			gpio5: gpio@c000 {
				compatible = "snps,dw-apb-gpio";
				reg = <0xc000 0x400>;
				#address-cells = <1>;
				#size-cells = <0>;

				portf: gpio-port@5 {
					compatible = "snps,dw-apb-gpio-port";
					gpio-controller;
					#gpio-cells = <2>;
					snps,nr-gpios = <32>;
					reg = <0>;
				};
			};
		};

		chip: chip-control@ea0000 {
@@ -372,6 +343,21 @@
			ranges = <0 0xfc0000 0x10000>;
			interrupt-parent = <&sic>;

			sm_gpio1: gpio@5000 {
				compatible = "snps,dw-apb-gpio";
				reg = <0x5000 0x400>;
				#address-cells = <1>;
				#size-cells = <0>;

				portf: gpio-port@5 {
					compatible = "snps,dw-apb-gpio-port";
					gpio-controller;
					#gpio-cells = <2>;
					snps,nr-gpios = <32>;
					reg = <0>;
				};
			};

			i2c2: i2c@7000 {
				compatible = "snps,designware-i2c";
				#address-cells = <1>;
@@ -422,6 +408,21 @@
				status = "disabled";
			};

			sm_gpio0: gpio@c000 {
				compatible = "snps,dw-apb-gpio";
				reg = <0xc000 0x400>;
				#address-cells = <1>;
				#size-cells = <0>;

				porte: gpio-port@4 {
					compatible = "snps,dw-apb-gpio-port";
					gpio-controller;
					#gpio-cells = <2>;
					snps,nr-gpios = <32>;
					reg = <0>;
				};
			};

			sysctrl: pin-controller@d000 {
				compatible = "marvell,berlin2q-system-ctrl";
				reg = <0xd000 0x100>;
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