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Commit 4b0ac5d7 authored by Devesh Jhunjhunwala's avatar Devesh Jhunjhunwala
Browse files

clk: msm: gcc-8996: Add pinctrl clk for ln_bb_clk 



Add the pinctrl clock for ln_bb_clk to the GCC driver
for MSM8996.

CRs-Fixed: 1063062
Change-Id: If85a0dbb26e350588cbd6614c032bf208a205be2
Signed-off-by: default avatarDevesh Jhunjhunwala <deveshj@codeaurora.org>
parent e24f8089

drivers/clk/msm/clock-gcc-8996.c

+4 −0
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ DEFINE_CLK_DUMMY(gcc_ce1_axi_m_clk, 0); 
DEFINE_CLK_DUMMY(measure_only_bimc_hmss_axi_clk, 0);



DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk, ln_bb_a_clk, LN_BB_CLK_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(ln_bb_clk_pin, ln_bb_a_clk_pin,

				LN_BB_CLK_PIN_ID);

static DEFINE_CLK_VOTER(mcd_ce1_clk, &ce1_clk.c, 85710000);

static DEFINE_CLK_VOTER(pnoc_keepalive_a_clk, &pnoc_a_clk.c, LONG_MAX);

static DEFINE_CLK_VOTER(pnoc_msmbus_clk, &pnoc_clk.c, LONG_MAX);
@@ -3368,6 +3370,8 @@ static struct clk_lookup msm_clocks_rpm_8996[] = { 
	CLK_LIST(ipa_clk),

	CLK_LIST(ln_bb_clk),

	CLK_LIST(ln_bb_a_clk),

	CLK_LIST(ln_bb_clk_pin),

	CLK_LIST(ln_bb_a_clk_pin),

	CLK_LIST(mcd_ce1_clk),

	CLK_LIST(pnoc_keepalive_a_clk),

	CLK_LIST(pnoc_msmbus_clk),

include/dt-bindings/clock/msm-clocks-8996.h

+2 −0
Original line number Diff line number Diff line
@@ -52,6 +52,8 @@ 
#define clk_ipa_clk			0xfa685cda

#define clk_ln_bb_clk			0x3ab0b36d

#define clk_ln_bb_a_clk			0xc7257ea8

#define clk_ln_bb_clk_pin		0x1b1c476a

#define clk_ln_bb_a_clk_pin		0x9cbb5411

#define clk_mcd_ce1_clk			0xbb615d26

#define clk_pnoc_keepalive_a_clk	0xf8f91f0b

#define clk_pnoc_msmbus_clk		0x38b95c77

include/dt-bindings/clock/msm-clocks-hwio-8996.h

+2 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.

/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -42,6 +42,7 @@ 
#define RF_CLK1_ID						0x4

#define RF_CLK2_ID						0x5

#define LN_BB_CLK_ID						0x8

#define LN_BB_CLK_PIN_ID					0x8

#define DIV_CLK1_ID						0xb

#define DIV_CLK2_ID						0xc

#define DIV_CLK3_ID						0xd