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Commit 4a24eef6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (34 commits)
  net: fix build erros with CONFIG_BUG=n, CONFIG_GENERIC_BUG=n
  ipv6: skb_dst() can be NULL in ipv6_hop_jumbo().
  tg3: Update copyright and driver version
  tg3: Disable 5717 serdes and B0 support
  tg3: Add reliable serdes detection for 5717 A0
  tg3: Fix std rx prod ring handling
  tg3: Fix std prod ring nicaddr for 5787 and 57765
  sfc: Fix conditions for MDIO self-test
  sfc: Fix polling for slow MCDI operations
  e1000e: workaround link issues on busy hub in half duplex on 82577/82578
  e1000e: MDIO slow mode should always be done for 82577
  ixgbe: update copyright dates
  ixgbe: Do not attempt to perform interrupts in netpoll when down
  cfg80211: fix refcount imbalance when wext is disabled
  mac80211: fix queue selection for data frames on monitor interfaces
  iwlwifi: silence buffer overflow warning
  iwlwifi: disable tx on beacon update notification
  iwlwifi: fix iwl_queue_used bug when read_ptr == write_ptr
  mac80211: fix endian error
  mac80211: add missing sanity checks for action frames
  ...
parents 4f374425 cd65c3c7

drivers/net/e1000e/e1000.h

+0 −1
Original line number Diff line number Diff line
@@ -582,7 +582,6 @@ extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 
extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);

extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,

                                         u16 data);

extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);

extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);

extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);

extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);

drivers/net/e1000e/ich8lan.c

+71 −5
Original line number Diff line number Diff line
@@ -138,6 +138,10 @@ 
#define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */

#define E1000_NVM_K1_ENABLE 0x1  /* NVM Enable K1 bit */



/* KMRN Mode Control */

#define HV_KMRN_MODE_CTRL      PHY_REG(769, 16)

#define HV_KMRN_MDIO_SLOW      0x0400



/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */

/* Offset 04h HSFSTS */

union ich8_hws_flash_status {
@@ -219,6 +223,7 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active); 
static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);

static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);

static s32  e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);

static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);



static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)

{
@@ -270,7 +275,21 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) 
	phy->autoneg_mask             = AUTONEG_ADVERTISE_SPEED_DEFAULT;



	phy->id = e1000_phy_unknown;

	e1000e_get_phy_id(hw);

	ret_val = e1000e_get_phy_id(hw);

	if (ret_val)

		goto out;

	if ((phy->id == 0) || (phy->id == PHY_REVISION_MASK)) {

		/*

		 * In case the PHY needs to be in mdio slow mode (eg. 82577),

		 * set slow mode and try to get the PHY id again.

		 */

		ret_val = e1000_set_mdio_slow_mode_hv(hw);

		if (ret_val)

			goto out;

		ret_val = e1000e_get_phy_id(hw);

		if (ret_val)

			goto out;

	}

	phy->type = e1000e_get_phy_type_from_id(phy->id);



	switch (phy->type) {
@@ -292,6 +311,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) 
		break;

	}



out:

	return ret_val;

}
@@ -1075,6 +1095,26 @@ out: 
}





/**

 *  e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode

 *  @hw:   pointer to the HW structure

 **/

static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)

{

	s32 ret_val;

	u16 data;



	ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data);

	if (ret_val)

		return ret_val;



	data |= HV_KMRN_MDIO_SLOW;



	ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data);



	return ret_val;

}



/**

 *  e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be

 *  done after every PHY reset.
@@ -1082,10 +1122,18 @@ out: 
static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)

{

	s32 ret_val = 0;

	u16 phy_data;



	if (hw->mac.type != e1000_pchlan)

		return ret_val;



	/* Set MDIO slow mode before any other MDIO access */

	if (hw->phy.type == e1000_phy_82577) {

		ret_val = e1000_set_mdio_slow_mode_hv(hw);

		if (ret_val)

			goto out;

	}



	if (((hw->phy.type == e1000_phy_82577) &&

	     ((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||

	    ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {
@@ -1118,16 +1166,32 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) 


	hw->phy.addr = 1;

	ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);

	hw->phy.ops.release(hw);

	if (ret_val)

		goto out;

	hw->phy.ops.release(hw);



	/*

	 * Configure the K1 Si workaround during phy reset assuming there is

	 * link so that it disables K1 if link is in 1Gbps.

	 */

	ret_val = e1000_k1_gig_workaround_hv(hw, true);

	if (ret_val)

		goto out;



	/* Workaround for link disconnects on a busy hub in half duplex */

	ret_val = hw->phy.ops.acquire(hw);

	if (ret_val)

		goto out;

	ret_val = hw->phy.ops.read_reg_locked(hw,

	                                      PHY_REG(BM_PORT_CTRL_PAGE, 17),

	                                      &phy_data);

	if (ret_val)

		goto release;

	ret_val = hw->phy.ops.write_reg_locked(hw,

	                                       PHY_REG(BM_PORT_CTRL_PAGE, 17),

	                                       phy_data & 0x00FF);

release:

	hw->phy.ops.release(hw);

out:

	return ret_val;

}
@@ -1184,6 +1248,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) 
	/* Allow time for h/w to get to a quiescent state after reset */

	mdelay(10);



	/* Perform any necessary post-reset workarounds */

	if (hw->mac.type == e1000_pchlan) {

		ret_val = e1000_hv_phy_workarounds_ich8lan(hw);

		if (ret_val)
@@ -2484,6 +2549,10 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) 
	if (!ret_val)

		e1000_release_swflag_ich8lan(hw);



	/* Perform any necessary post-reset workarounds */

	if (hw->mac.type == e1000_pchlan)

		ret_val = e1000_hv_phy_workarounds_ich8lan(hw);



	if (ctrl & E1000_CTRL_PHY_RST)

		ret_val = hw->phy.ops.get_cfg_done(hw);
@@ -2528,9 +2597,6 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) 
	kab |= E1000_KABGTXD_BGSQLBIAS;

	ew32(KABGTXD, kab);



	if (hw->mac.type == e1000_pchlan)

		ret_val = e1000_hv_phy_workarounds_ich8lan(hw);



out:

	return ret_val;

}

drivers/net/e1000e/phy.c

+0 −85
Original line number Diff line number Diff line
@@ -152,32 +152,9 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw) 
		if (phy->id != 0 && phy->id != PHY_REVISION_MASK)

			goto out;



		/*

		 * If the PHY ID is still unknown, we may have an 82577

		 * without link.  We will try again after setting Slow MDIC

		 * mode. No harm in trying again in this case since the PHY

		 * ID is unknown at this point anyway.

		 */

		ret_val = phy->ops.acquire(hw);

		if (ret_val)

			goto out;

		ret_val = e1000_set_mdio_slow_mode_hv(hw, true);

		if (ret_val)

			goto out;

		phy->ops.release(hw);



		retry_count++;

	}

out:

	/* Revert to MDIO fast mode, if applicable */

	if (retry_count) {

		ret_val = phy->ops.acquire(hw);

		if (ret_val)

			return ret_val;

		ret_val = e1000_set_mdio_slow_mode_hv(hw, false);

		phy->ops.release(hw);

	}



	return ret_val;

}
@@ -2790,38 +2767,6 @@ static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active) 
	return 0;

}



/**

 *  e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode

 *  @hw:   pointer to the HW structure

 *  @slow: true for slow mode, false for normal mode

 *

 *  Assumes semaphore already acquired.

 **/

s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow)

{

	s32 ret_val = 0;

	u16 data = 0;



	/* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */

	hw->phy.addr = 1;

	ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,

				         (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));

	if (ret_val)

		goto out;



	ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1,

	                                   (0x2180 | (slow << 10)));

	if (ret_val)

		goto out;



	/* dummy read when reverting to fast mode - throw away result */

	if (!slow)

		ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data);



out:

	return ret_val;

}



/**

 *  __e1000_read_phy_reg_hv -  Read HV PHY register

 *  @hw: pointer to the HW structure
@@ -2839,7 +2784,6 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, 
	s32 ret_val;

	u16 page = BM_PHY_REG_PAGE(offset);

	u16 reg = BM_PHY_REG_NUM(offset);

	bool in_slow_mode = false;



	if (!locked) {

		ret_val = hw->phy.ops.acquire(hw);
@@ -2847,16 +2791,6 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, 
			return ret_val;

	}



	/* Workaround failure in MDIO access while cable is disconnected */

	if ((hw->phy.type == e1000_phy_82577) &&

	    !(er32(STATUS) & E1000_STATUS_LU)) {

		ret_val = e1000_set_mdio_slow_mode_hv(hw, true);

		if (ret_val)

			goto out;



		in_slow_mode = true;

	}



	/* Page 800 works differently than the rest so it has its own func */

	if (page == BM_WUC_PAGE) {

		ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
@@ -2893,10 +2827,6 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, 
	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,

	                                  data);

out:

	/* Revert to MDIO fast mode, if applicable */

	if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)

		ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);



	if (!locked)

		hw->phy.ops.release(hw);
@@ -2948,7 +2878,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, 
	s32 ret_val;

	u16 page = BM_PHY_REG_PAGE(offset);

	u16 reg = BM_PHY_REG_NUM(offset);

	bool in_slow_mode = false;



	if (!locked) {

		ret_val = hw->phy.ops.acquire(hw);
@@ -2956,16 +2885,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, 
			return ret_val;

	}



	/* Workaround failure in MDIO access while cable is disconnected */

	if ((hw->phy.type == e1000_phy_82577) &&

	    !(er32(STATUS) & E1000_STATUS_LU)) {

		ret_val = e1000_set_mdio_slow_mode_hv(hw, true);

		if (ret_val)

			goto out;



		in_slow_mode = true;

	}



	/* Page 800 works differently than the rest so it has its own func */

	if (page == BM_WUC_PAGE) {

		ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
@@ -3019,10 +2938,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, 
	                                  data);



out:

	/* Revert to MDIO fast mode, if applicable */

	if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)

		ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);



	if (!locked)

		hw->phy.ops.release(hw);

drivers/net/ixgbe/Makefile

+1 −1
Original line number Diff line number Diff line 
################################################################################

#

# Intel 10 Gigabit PCI Express Linux driver

# Copyright(c) 1999 - 2009 Intel Corporation.

# Copyright(c) 1999 - 2010 Intel Corporation.

#

# This program is free software; you can redistribute it and/or modify it

# under the terms and conditions of the GNU General Public License,

drivers/net/ixgbe/ixgbe.h

+1 −1
Original line number Diff line number Diff line 
/*******************************************************************************



  Intel 10 Gigabit PCI Express Linux driver

  Copyright(c) 1999 - 2009 Intel Corporation.

  Copyright(c) 1999 - 2010 Intel Corporation.



  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,