Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 49802967 authored by Greg Ungerer's avatar Greg Ungerer
Browse files

m68knommu: remove ColdFire direct interrupt register access 



Now that the ColdFire 5272 has full interrupt controller functionality
we can remove all the interrupt masking and acking code from the FEC
ethernet driver.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 9075216d

arch/m68knommu/platform/5272/config.c

+8 −57
Original line number Diff line number Diff line
@@ -31,11 +31,11 @@ unsigned char ledbank = 0xff; 
static struct mcf_platform_uart m5272_uart_platform[] = {

	{

		.mapbase	= MCF_MBAR + MCFUART_BASE1,

		.irq		= 73,

		.irq		= MCF_IRQ_UART1,

	},

	{

		.mapbase 	= MCF_MBAR + MCFUART_BASE2,

		.irq		= 74,

		.irq		= MCF_IRQ_UART2,

	},

	{ },

};
@@ -53,18 +53,18 @@ static struct resource m5272_fec_resources[] = { 
		.flags		= IORESOURCE_MEM,

	},

	{

		.start		= 86,

		.end		= 86,

		.start		= MCF_IRQ_ERX,

		.end		= MCF_IRQ_ERX,

		.flags		= IORESOURCE_IRQ,

	},

	{

		.start		= 87,

		.end		= 87,

		.start		= MCF_IRQ_ETX,

		.end		= MCF_IRQ_ETX,

		.flags		= IORESOURCE_IRQ,

	},

	{

		.start		= 88,

		.end		= 88,

		.start		= MCF_IRQ_ENTC,

		.end		= MCF_IRQ_ENTC,

		.flags		= IORESOURCE_IRQ,

	},

};
@@ -88,9 +88,6 @@ static void __init m5272_uart_init_line(int line, int irq) 
	u32 v;



	if ((line >= 0) && (line < 2)) {

		v = (line) ? 0x0e000000 : 0xe0000000;

		writel(v, MCF_MBAR + MCFSIM_ICR2);



		/* Enable the output lines for the serial ports */

		v = readl(MCF_MBAR + MCFSIM_PBCNT);

		v = (v & ~0x000000ff) | 0x00000055;
@@ -113,48 +110,6 @@ static void __init m5272_uarts_init(void) 


/***************************************************************************/



static void __init m5272_fec_init(void)

{

	u32 imr;



	/* Unmask FEC interrupts at ColdFire interrupt controller */

	imr = readl(MCF_MBAR + MCFSIM_ICR3);

	imr = (imr & ~0x00000fff) | 0x00000ddd;

	writel(imr, MCF_MBAR + MCFSIM_ICR3);



	imr = readl(MCF_MBAR + MCFSIM_ICR1);

	imr = (imr & ~0x0f000000) | 0x0d000000;

	writel(imr, MCF_MBAR + MCFSIM_ICR1);

}



/***************************************************************************/



void mcf_disableall(void)

{

	volatile unsigned long	*icrp;



	icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);

	icrp[0] = 0x88888888;

	icrp[1] = 0x88888888;

	icrp[2] = 0x88888888;

	icrp[3] = 0x88888888;

}



/***************************************************************************/



static void __init m5272_timers_init(void)

{

	/* Timer1 @ level6 is always used as system timer */

	writel((0x8 | 0x6) << ((4 - 1) * 4), MCF_MBAR + MCFSIM_ICR1);



#ifdef CONFIG_HIGHPROFILE

	/* Timer2 @ level7 is to be used as a high speed profile timer  */

	writel((0x8 | 0x7) << ((4 - 2) * 4), MCF_MBAR + MCFSIM_ICR1);

#endif

}



/***************************************************************************/



static void m5272_cpu_reset(void)

{

	local_irq_disable();
@@ -178,8 +133,6 @@ void __init config_BSP(char *commandp, int size) 
	*pivrp = 0x40;

#endif



	mcf_disableall();



#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)

	/* Copy command line from FLASH to local buffer... */

	memcpy(commandp, (char *) 0xf0004000, size);
@@ -191,7 +144,6 @@ void __init config_BSP(char *commandp, int size) 
#endif



	mach_reset = m5272_cpu_reset;

	m5272_timers_init();

}



/***************************************************************************/
@@ -199,7 +151,6 @@ void __init config_BSP(char *commandp, int size) 
static int __init init_BSP(void)

{

	m5272_uarts_init();

	m5272_fec_init();

	platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));

	return 0;

}

drivers/net/fec.c

+3 −15
Original line number Diff line number Diff line
@@ -1142,19 +1142,9 @@ static void __inline__ fec_request_mii_intr(struct net_device *dev) 
		printk("FEC: Could not allocate fec(MII) IRQ(66)!\n");

}



static void __inline__ fec_disable_phy_intr(void)

static void __inline__ fec_disable_phy_intr(struct net_device *dev)

{

	volatile unsigned long *icrp;

	icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);

	*icrp = 0x08000000;

}



static void __inline__ fec_phy_ack_intr(void)

{

	volatile unsigned long *icrp;

	/* Acknowledge the interrupt */

	icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);

	*icrp = 0x0d000000;

	free_irq(66, dev);

}

#endif
@@ -1386,7 +1376,7 @@ mii_discover_phy(uint mii_reg, struct net_device *dev) 
		writel(0, fep->hwp + FEC_MII_SPEED);

		fep->phy_speed = 0;

#ifdef HAVE_mii_link_interrupt

		fec_disable_phy_intr();

		fec_disable_phy_intr(dev);

#endif

	}

}
@@ -1399,8 +1389,6 @@ mii_link_interrupt(int irq, void * dev_id) 
	struct	net_device *dev = dev_id;

	struct fec_enet_private *fep = netdev_priv(dev);



	fec_phy_ack_intr();



	mii_do_cmd(dev, fep->phy->ack_int);

	mii_do_cmd(dev, phy_cmd_relink);  /* restart and display status */