Commit 49642ac8 authored Oct 07, 2011 by Jon Hunter Committed by Paul Walmsley Oct 07, 2011

ARM: OMAP3+: dpll: use DPLLs recalc function instead of omap2_get_dpll_rate



This is a continuation of Mike Turquette's patch "OMAP3+: use
DPLL's round_rate when setting rate".

omap3_noncore_dpll_set_rate() and omap3_noncore_dpll_enable() call
omap2_get_dpll_rate() explicitly. It may be necessary for some
DPLLs to use a different function and so use the DPLLs recalc()
function pointer instead.

An example is the DPLL_ABE on OMAP4 which can have a 4X multiplier
in addition to the usual MN multipler and dividers and therefore
uses a different round_rate and recalc function.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Cc: Mike Turquette <mturquette@ti.com>
Cc: Misael Lopez Cruz <misael.lopez@ti.com>
[paul@pwsan.com: merged this patch with Mike's "use clock's recalc in DPLL
 handling" patch; also reported by Misael]
Signed-off-by: Paul Walmsley <paul@pwsan.com>

parent 273a1ce9

arch/arm/mach-omap2/dpll3xxx.c

+5 −2

Original line number	Diff line number	Diff line
		@@ -390,7 +390,8 @@ int omap3_noncore_dpll_enable(struct clk *clk)
		* propagating?
		*/
		if (!r)
		clk->rate = omap2_get_dpll_rate(clk);
		clk->rate = (clk->recalc) ? clk->recalc(clk) :
		omap2_get_dpll_rate(clk);

		return r;
		}
		@@ -424,6 +425,7 @@ void omap3_noncore_dpll_disable(struct clk *clk)
		int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
		{
		struct clk *new_parent = NULL;
		unsigned long hw_rate;
		u16 freqsel = 0;
		struct dpll_data *dd;
		int ret;
		@@ -435,7 +437,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
		if (!dd)
		return -EINVAL;

		if (rate == omap2_get_dpll_rate(clk))
		hw_rate = (clk->recalc) ? clk->recalc(clk) : omap2_get_dpll_rate(clk);
		if (rate == hw_rate)
		return 0;

		/*