Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4907cb7b authored by Anatol Pomozov's avatar Anatol Pomozov Committed by Jiri Kosina
Browse files

treewide: fix comment/printk/variable typos

parent 203fa3fe
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -427,7 +427,7 @@ DMA engine callback Functions*/
 * intel_mid_dma_tx_submit -	callback to submit DMA transaction
 * @tx: dma engine descriptor
 *
 * Submit the DMA trasaction for this descriptor, start if ch idle
 * Submit the DMA transaction for this descriptor, start if ch idle
 */
static dma_cookie_t intel_mid_dma_tx_submit(struct dma_async_tx_descriptor *tx)
{
+1 −1
Original line number Diff line number Diff line
@@ -364,7 +364,7 @@ typhoon_inc_rxfree_index(u32 *index, const int count)
static inline void
typhoon_inc_tx_index(u32 *index, const int count)
{
	/* if we start using the Hi Tx ring, this needs updateing */
	/* if we start using the Hi Tx ring, this needs updating */
	typhoon_inc_index(index, count, TXLO_ENTRIES);
}

+1 −1
Original line number Diff line number Diff line
@@ -1458,7 +1458,7 @@ struct bnx2x {
	int				fw_stats_req_sz;

	/*
	 * FW statistics data shortcut (points at the begining of
	 * FW statistics data shortcut (points at the beginning of
	 * fw_stats buffer + fw_stats_req_sz).
	 */
	struct bnx2x_fw_stats_data	*fw_stats_data;
+1 −1
Original line number Diff line number Diff line
@@ -1321,7 +1321,7 @@ void bnx2x_init_mcast_obj(struct bnx2x *bp,
 * the current command will be enqueued to the tail of the
 * pending commands list.
 *
 * Return: 0 is operation was sucessfull and there are no pending completions,
 * Return: 0 is operation was successfull and there are no pending completions,
 *         negative if there were errors, positive if there are pending
 *         completions.
 */
+3 −3
Original line number Diff line number Diff line
@@ -315,7 +315,7 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
	u16 box_reg = 0, box_extreg = 0;
	u8 u1b_tmp;
	bool isfw_read = false;
	bool bwrite_sucess = false;
	bool bwrite_success = false;
	u8 wait_h2c_limmit = 100;
	u8 wait_writeh2c_limmit = 100;
	u8 boxcontent[4], boxextcontent[2];
@@ -354,7 +354,7 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
		}
	}

	while (!bwrite_sucess) {
	while (!bwrite_success) {
		wait_writeh2c_limmit--;
		if (wait_writeh2c_limmit == 0) {
			RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
@@ -491,7 +491,7 @@ static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
			break;
		}

		bwrite_sucess = true;
		bwrite_success = true;

		rtlhal->last_hmeboxnum = boxnum + 1;
		if (rtlhal->last_hmeboxnum == 4)
Loading