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Commit 4889ee96 authored by Alok Chauhan's avatar Alok Chauhan
Browse files

ARM: dts: msm: configure SPI node for msmgold 



Configure BLSP1QUP3 in SPI mode to enable communication
with the spi slave devices

Change-Id: I2f1539a963ff810337af4f56e6abb244af10cbc7
Signed-off-by: default avatarAlok Chauhan <alokc@codeaurora.org>
parent 60d83900

arch/arm/boot/dts/qcom/msmgold-pinctrl.dtsi

+60 −0
Original line number Diff line number Diff line
@@ -518,5 +518,65 @@ 
				};

			};

		};



		spi3 {

			spi3_default: spi3_default {

			/* active state */

				mux {

					/* MOSI, MISO, CLK */

					pins = "gpio8", "gpio9", "gpio11";

					function = "blsp_spi3";

				};



				config {

					pins = "gpio8", "gpio9", "gpio11";

					drive-strength = <12>; /* 12 MA */

					bias-disable = <0>; /* No PULL */

				};

			};



			spi3_sleep: spi3_sleep {

				/* suspended state */

				mux {

					/* MOSI, MISO, CLK */

					pins = "gpio8", "gpio9", "gpio11";

					function = "gpio";

				};



				config {

					pins = "gpio8", "gpio9", "gpio11";

					drive-strength = <2>; /* 2 MA */

					bias-pull-down; /* PULL Down */

				};

			};



			spi3_cs0_active: cs0_active {

				/* CS */

				mux {

					pins = "gpio10";

					function = "blsp_spi3";

				};



				config {

					pins = "gpio10";

					drive-strength = <2>;

					bias-disable = <0>;

				};

			};



			spi3_cs0_sleep: cs0_sleep {

				/* CS */

				mux {

					pins = "gpio10";

					function = "gpio";

				};



				config {

					pins = "gpio10";

					drive-strength = <2>;

					bias-disable = <0>;

				};

			};

		};

	};

};

arch/arm/boot/dts/qcom/msmgold.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
		smd11 = &smdtty_data11;

		smd21 = &smdtty_data21;

		smd36 = &smdtty_loopback;

		spi3 = &spi_3;

	};



	reserved-memory {
@@ -881,6 +882,31 @@ 
		};

	};



	spi_3: spi@78b7000 { /* BLSP1 QUP3 */

		compatible = "qcom,spi-qup-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "spi_physical", "spi_bam_physical";

		reg = <0x78b7000 0x600>,

			<0x7884000 0x1f000>;

		interrupt-names = "spi_irq", "spi_bam_irq";

		interrupts = <0 97 0>, <0 238 0>;

		spi-max-frequency = <19200000>;

		pinctrl-names = "spi_default", "spi_sleep";

		pinctrl-0 = <&spi3_default &spi3_cs0_active>;

		pinctrl-1 = <&spi3_sleep &spi3_cs0_sleep>;

		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,

				<&clock_gcc clk_gcc_blsp1_qup3_spi_apps_clk>;

		clock-names = "iface_clk", "core_clk";

		qcom,infinite-mode = <0>;

		qcom,use-bam;

		qcom,use-pinctrl;

		qcom,ver-reg-exists;

		qcom,bam-consumer-pipe-index = <8>;

		qcom,bam-producer-pipe-index = <9>;

		qcom,master-id = <86>;

		status = "disabled";

	};

};



#include "msm-pm8937-rpm-regulator.dtsi"