Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 47b170af authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh

Pull SuperH updates from Paul Mundt:

 - Migration off of old-style dynamic IRQ API.

 - irqdomain and generic irq chip propagation.

 - div4/6 clock consolidation, another step towards co-existing with the
   common struct clk infrastructure.

 - Extensive PFC rework
   - Decoupling GPIO from pin state.
   - Initial pinctrl support to facilitate incremental migration off of
     legacy pinmux.
   - gpiolib support made optional, and made pinctrl-backed.

* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (38 commits)
  sh: pfc: pin config get/set support.
  sh: pfc: Prefer DRV_NAME over KBUILD_MODNAME.
  sh: pfc: pinctrl legacy group support.
  sh: pfc: Ignore pinmux GPIOs with invalid enum IDs.
  sh: pfc: Export pinctrl binding init symbol.
  sh: pfc: Error out on pinctrl init resolution failure.
  sh: pfc: Make pr_fmt consistent across pfc drivers.
  sh: pfc: pinctrl legacy function support.
  sh: pfc: Rudimentary pinctrl-backed GPIO support.
  sh: pfc: Dumb GPIO stringification.
  sh: pfc: Shuffle PFC support core.
  sh: pfc: Verify pin type encoding size at build time.
  sh: pfc: Kill off unused pinmux bias flags.
  sh: pfc: Make gpio chip support optional where possible.
  sh: pfc: Split out gpio chip support.
  sh64: Fix up section mismatch warnings.
  sh64: Attempt to make reserved insn trap handler resemble C.
  sh: Consolidate die definitions for trap handlers.
  sh64: Kill off old exception debugging helpers.
  sh64: Use generic unaligned access control/counters.
  ...
parents 83c7f722 9ff561fd
Loading
Loading
Loading
Loading
+1 −0
Original line number Original line Diff line number Diff line
@@ -60,6 +60,7 @@ config SUPERH32


config SUPERH64
config SUPERH64
	def_bool ARCH = "sh64"
	def_bool ARCH = "sh64"
	select KALLSYMS


config ARCH_DEFCONFIG
config ARCH_DEFCONFIG
	string
	string
+5 −0
Original line number Original line Diff line number Diff line
@@ -44,6 +44,8 @@ config SH_7721_SOLUTION_ENGINE
config SH_7722_SOLUTION_ENGINE
config SH_7722_SOLUTION_ENGINE
	bool "SolutionEngine7722"
	bool "SolutionEngine7722"
	select SOLUTION_ENGINE
	select SOLUTION_ENGINE
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	depends on CPU_SUBTYPE_SH7722
	depends on CPU_SUBTYPE_SH7722
	help
	help
	  Select 7722 SolutionEngine if configuring for a Hitachi SH772
	  Select 7722 SolutionEngine if configuring for a Hitachi SH772
@@ -80,6 +82,8 @@ config SH_7780_SOLUTION_ENGINE
config SH_7343_SOLUTION_ENGINE
config SH_7343_SOLUTION_ENGINE
	bool "SolutionEngine7343"
	bool "SolutionEngine7343"
	select SOLUTION_ENGINE
	select SOLUTION_ENGINE
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	depends on CPU_SUBTYPE_SH7343
	depends on CPU_SUBTYPE_SH7343
	help
	help
	  Select 7343 SolutionEngine if configuring for a Hitachi
	  Select 7343 SolutionEngine if configuring for a Hitachi
@@ -295,6 +299,7 @@ config SH_X3PROTO
	bool "SH-X3 Prototype board"
	bool "SH-X3 Prototype board"
	depends on CPU_SUBTYPE_SHX3
	depends on CPU_SUBTYPE_SHX3
	select NO_IOPORT if !PCI
	select NO_IOPORT if !PCI
	select IRQ_DOMAIN


config SH_MAGIC_PANEL_R2
config SH_MAGIC_PANEL_R2
	bool "Magic Panel R2"
	bool "Magic Panel R2"
+11 −21
Original line number Original line Diff line number Diff line
@@ -8,10 +8,11 @@
 * This file is part of the LinuxDC project (www.linuxdc.org)
 * This file is part of the LinuxDC project (www.linuxdc.org)
 * Released under the terms of the GNU GPL v2.0
 * Released under the terms of the GNU GPL v2.0
 */
 */

#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <linux/irq.h>
#include <linux/export.h>
#include <linux/err.h>
#include <mach/sysasic.h>
#include <mach/sysasic.h>


/*
/*
@@ -141,26 +142,15 @@ int systemasic_irq_demux(int irq)


void systemasic_irq_init(void)
void systemasic_irq_init(void)
{
{
	int i, nid = cpu_to_node(boot_cpu_data);
	int irq_base, i;


	/* Assign all virtual IRQs to the System ASIC int. handler */
	irq_base = irq_alloc_descs(HW_EVENT_IRQ_BASE, HW_EVENT_IRQ_BASE,
	for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
				   HW_EVENT_IRQ_MAX - HW_EVENT_IRQ_BASE, -1);
		unsigned int irq;
	if (IS_ERR_VALUE(irq_base)) {

		pr_err("%s: failed hooking irqs\n", __func__);
		irq = create_irq_nr(i, nid);
		if (unlikely(irq == 0)) {
			pr_err("%s: failed hooking irq %d for systemasic\n",
			       __func__, i);
			return;
		}

		if (unlikely(irq != i)) {
			pr_err("%s: got irq %d but wanted %d, bailing.\n",
			       __func__, irq, i);
			destroy_irq(irq);
		return;
		return;
	}
	}


	for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
		irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq);
		irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq);
}
}
}
+86 −43
Original line number Original line Diff line number Diff line
/*
/*
 * linux/arch/sh/boards/se/7343/irq.c
 * Hitachi UL SolutionEngine 7343 FPGA IRQ Support.
 *
 *
 * Copyright (C) 2008  Yoshihiro Shimoda
 * Copyright (C) 2008  Yoshihiro Shimoda
 * Copyright (C) 2012  Paul Mundt
 *
 *
 * Based on linux/arch/sh/boards/se/7722/irq.c
 * Based on linux/arch/sh/boards/se/7343/irq.c
 * Copyright (C) 2007  Nobuhiro Iwamatsu
 * Copyright (C) 2007  Nobuhiro Iwamatsu
 *
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 * for more details.
 */
 */
#define DRV_NAME "SE7343-FPGA"
#define pr_fmt(fmt) DRV_NAME ": " fmt

#define irq_reg_readl	ioread16
#define irq_reg_writel	iowrite16

#include <linux/init.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/io.h>
#include <asm/sizes.h>
#include <mach-se/mach/se7343.h>
#include <mach-se/mach/se7343.h>


unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
#define PA_CPLD_BASE_ADDR	0x11400000
#define PA_CPLD_ST_REG		0x08	/* CPLD Interrupt status register */
#define PA_CPLD_IMSK_REG	0x0a	/* CPLD Interrupt mask register */


static void disable_se7343_irq(struct irq_data *data)
static void __iomem *se7343_irq_regs;
{
struct irq_domain *se7343_irq_domain;
	unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
	__raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
}


static void enable_se7343_irq(struct irq_data *data)
static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
{
{
	unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
	struct irq_data *data = irq_get_irq_data(irq);
	__raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
	struct irq_chip *chip = irq_data_get_irq_chip(data);
}
	unsigned long mask;
	int bit;


static struct irq_chip se7343_irq_chip __read_mostly = {
	chip->irq_mask_ack(data);
	.name		= "SE7343-FPGA",
	.irq_mask	= disable_se7343_irq,
	.irq_unmask	= enable_se7343_irq,
};


static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
	mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG);

	for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR)
		generic_handle_irq(irq_linear_revmap(se7343_irq_domain, bit));

	chip->irq_unmask(data);
}

static void __init se7343_domain_init(void)
{
{
	unsigned short intv = __raw_readw(PA_CPLD_ST);
	int i;
	unsigned int ext_irq = 0;


	intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
	se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,
						  &irq_domain_simple_ops, NULL);
	if (unlikely(!se7343_irq_domain)) {
		printk("Failed to get IRQ domain\n");
		return;
	}


	for (; intv; intv >>= 1, ext_irq++) {
	for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
		if (!(intv & 1))
		int irq = irq_create_mapping(se7343_irq_domain, i);
			continue;


		generic_handle_irq(se7343_fpga_irq[ext_irq]);
		if (unlikely(irq == 0)) {
			printk("Failed to allocate IRQ %d\n", i);
			return;
		}
	}
	}
}
}


/*
static void __init se7343_gc_init(void)
 * Initialize IRQ setting
 */
void __init init_7343se_IRQ(void)
{
{
	int i, irq;
	struct irq_chip_generic *gc;
	struct irq_chip_type *ct;
	unsigned int irq_base;


	__raw_writew(0, PA_CPLD_IMSK);	/* disable all irqs */
	irq_base = irq_linear_revmap(se7343_irq_domain, 0);
	__raw_writew(0x2000, 0xb03fffec);	/* mrshpc irq enable */


	for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
	gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
		irq = create_irq();
				    handle_level_irq);
		if (irq < 0)
	if (unlikely(!gc))
		return;
		return;
		se7343_fpga_irq[i] = irq;


		irq_set_chip_and_handler_name(se7343_fpga_irq[i],
	ct = gc->chip_types;
					      &se7343_irq_chip,
	ct->chip.irq_mask = irq_gc_mask_set_bit;
					      handle_level_irq,
	ct->chip.irq_unmask = irq_gc_mask_clr_bit;
					      "level");


		irq_set_chip_data(se7343_fpga_irq[i], (void *)i);
	ct->regs.mask = PA_CPLD_IMSK_REG;
	}

	irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR),
			       IRQ_GC_INIT_MASK_CACHE,
			       IRQ_NOREQUEST | IRQ_NOPROBE, 0);


	irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
	irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
	irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);

	irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
	irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
	irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);

	irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
	irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
	irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);

	irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
	irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
	irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
}
}

/*
 * Initialize IRQ setting
 */
void __init init_7343se_IRQ(void)
{
	se7343_irq_regs = ioremap(PA_CPLD_BASE_ADDR, SZ_16);
	if (unlikely(!se7343_irq_regs)) {
		pr_err("Failed to remap CPLD\n");
		return;
	}

	/*
	 * All FPGA IRQs disabled by default
	 */
	iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG);

	__raw_writew(0x2000, 0xb03fffec);	/* mrshpc irq enable */

	se7343_domain_init();
	se7343_gc_init();
}
+6 −4
Original line number Original line Diff line number Diff line
@@ -5,6 +5,7 @@
#include <linux/serial_reg.h>
#include <linux/serial_reg.h>
#include <linux/usb/isp116x.h>
#include <linux/usb/isp116x.h>
#include <linux/delay.h>
#include <linux/delay.h>
#include <linux/irqdomain.h>
#include <asm/machvec.h>
#include <asm/machvec.h>
#include <mach-se/mach/se7343.h>
#include <mach-se/mach/se7343.h>
#include <asm/heartbeat.h>
#include <asm/heartbeat.h>
@@ -145,11 +146,12 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
static int __init sh7343se_devices_setup(void)
static int __init sh7343se_devices_setup(void)
{
{
	/* Wire-up dynamic vectors */
	/* Wire-up dynamic vectors */
	serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA];
	serial_platform_data[0].irq = irq_find_mapping(se7343_irq_domain,
	serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB];
						       SE7343_FPGA_IRQ_UARTA);

	serial_platform_data[1].irq = irq_find_mapping(se7343_irq_domain,
						       SE7343_FPGA_IRQ_UARTB);
	usb_resources[2].start = usb_resources[2].end =
	usb_resources[2].start = usb_resources[2].end =
		se7343_fpga_irq[SE7343_FPGA_IRQ_USB];
		irq_find_mapping(se7343_irq_domain, SE7343_FPGA_IRQ_USB);


	return platform_add_devices(sh7343se_platform_devices,
	return platform_add_devices(sh7343se_platform_devices,
				    ARRAY_SIZE(sh7343se_platform_devices));
				    ARRAY_SIZE(sh7343se_platform_devices));
Loading