Merge "clk: msm: clock-gcc: Update CX voltage levels for MSM8917" (47675c05) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/clk/msm/clock-gcc-8952.c

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -4332,6 +4332,8 @@ static int msm_gcc_probe(struct platform_device *pdev)
	} else if (compat_bin2) {		} else if (compat_bin2) {
	gpll0_clk_src.c.parent = &gpll0_clk_src_8937.c;		gpll0_clk_src.c.parent = &gpll0_clk_src_8937.c;
	gpll0_ao_clk_src.c.parent = &gpll0_ao_clk_src_8937.c;		gpll0_ao_clk_src.c.parent = &gpll0_ao_clk_src_8937.c;
			vdd_dig.num_levels = VDD_DIG_NUM_8917;
			vdd_hf_pll.num_levels = VDD_HF_PLL_NUM_8917;
	override_for_8917();		override_for_8917();
	} else {		} else {
	gpll0_clk_src.c.parent = &gpll0_clk_src_8952.c;		gpll0_clk_src.c.parent = &gpll0_clk_src_8952.c;

+18 −0

Original line number	Original line	Diff line number	Diff line
	@@ -413,6 +413,24 @@ enum vdd_dig_levels {
	VDD_DIG_NUM		VDD_DIG_NUM
	};		};

			enum vdd_dig_levels_8917 {
			VDD_DIG_NONE_8917,
			VDD_DIG_LOWER_8917,
			VDD_DIG_LOW_8917,
			VDD_DIG_NOMINAL_8917,
			VDD_DIG_NOM_PLUS_8917,
			VDD_DIG_HIGH_8917,
			VDD_DIG_NUM_8917
			};

			enum vdd_hf_pll_levels_8917 {
			VDD_HF_PLL_OFF_8917,
			VDD_HF_PLL_SVS_8917,
			VDD_HF_PLL_NOM_8917,
			VDD_HF_PLL_TUR_8917,
			VDD_HF_PLL_NUM_8917,
			};

	int vdd_corner[] = {		int vdd_corner[] = {
	RPM_REGULATOR_LEVEL_NONE, /* VDD_DIG_NONE */		RPM_REGULATOR_LEVEL_NONE, /* VDD_DIG_NONE */
	RPM_REGULATOR_LEVEL_SVS, /* VDD_DIG_SVS */		RPM_REGULATOR_LEVEL_SVS, /* VDD_DIG_SVS */