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Commit 4705a25c authored by Mike Frysinger's avatar Mike Frysinger
Browse files

Blackfin: dpmc: optimize SIC_IWR programming a little 



For parts with more than one SIC_IWR, we can optimize the writing
a little bit using better Blackfin insns.

Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 01f8e34c

arch/blackfin/mach-common/dpmc_modes.S

+6 −9
Original line number Diff line number Diff line
@@ -239,21 +239,18 @@ ENDPROC(_unset_dram_srfs) 


ENTRY(_set_sic_iwr)

#ifdef SIC_IWR0

	P0.H = hi(SIC_IWR0);

	P0.L = lo(SIC_IWR0);

	P1.H = hi(SIC_IWR1);

	P1.L = lo(SIC_IWR1);

	[P1] = R1;

	P0.H = hi(SYSMMR_BASE);

	P0.L = lo(SYSMMR_BASE);

	[P0 + (SIC_IWR0 - SYSMMR_BASE)] = R0;

	[P0 + (SIC_IWR1 - SYSMMR_BASE)] = R1;

# ifdef SIC_IWR2

	P1.H = hi(SIC_IWR2);

	P1.L = lo(SIC_IWR2);

	[P1] = R2;

	[P0 + (SIC_IWR2 - SYSMMR_BASE)] = R2;

# endif

#else

	P0.H = hi(SIC_IWR);

	P0.L = lo(SIC_IWR);

#endif

	[P0] = R0;

#endif



	SSYNC;

	RTS;