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Commit 46fb1f48 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Disable USB controller's clock gating on 8996v1 devices"

parents 14d991e2 8f20ef3d
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+1 −0
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@@ -24,6 +24,7 @@ Optional properties:
 - snps,lpm-nyet-thresh: If present, will determine the value of DCTL[LPM_NYET_Thres].
	If BESL value received from the host in the LPM token is less than this value we send LPM ACK to
	the host. Otherwise the device returns LPM NYET.
 - snps,disable-clk-gating: If present, disable controller's internal clock gating. Default it is enabled.

This is usually a subnode to DWC3 glue to which it is connected.

+1 −0
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@@ -116,5 +116,6 @@
	dwc3@6a00000 {
		usb-phy = <&qusb_phy0>, <&usb_nop_phy>;
		maximum-speed = "high-speed";
		snps,disable-clk-gating;
	};
};
+6 −1
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@@ -565,7 +565,10 @@ int dwc3_core_init(struct dwc3 *dwc)
	 * stuck when entering low power modes. Revisit when there is
	 * a way to differentiate HW that no longer needs this.
	 */
	if (dwc->disable_clk_gating) {
		dev_dbg(dwc->dev, "Disabling controller clock gating.\n");
		reg |= DWC3_GCTL_DSBLCLKGTNG;
	}

	dwc3_writel(dwc->regs, DWC3_GCTL, reg);

@@ -870,6 +873,8 @@ static int dwc3_probe(struct platform_device *pdev)
		if (!ret)
			dwc->lpm_nyet_thresh = (u8)lpm_nyet_thresh;

		dwc->disable_clk_gating = of_property_read_bool(node,
					"snps,disable-clk-gating");
		if (dwc->enable_bus_suspend) {
			pm_runtime_set_autosuspend_delay(dev, 500);
			pm_runtime_use_autosuspend(dev);
+2 −0
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@@ -927,6 +927,8 @@ struct dwc3 {
	unsigned		err_evt_seen:1;
	unsigned		usb3_u1u2_disable:1;
	unsigned		enable_bus_suspend:1;
	/* Indicate if need to disable controller internal clkgating */
	unsigned		disable_clk_gating:1;

	struct dwc3_gadget_events	dbg_gadget_events;