Loading arch/arm/boot/dts/qcom/msmtitanium.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -705,6 +705,7 @@ clock_gcc_mdss: qcom,gcc-mdss@1800000 { compatible = "qcom,gcc-mdss-titanium"; reg = <0x1800000 0x80000>; reg-names = "cc_base"; clock-names = "pclk0_src", "pclk1_src", "byte0_src", "byte1_src"; clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_mux>, Loading Loading
arch/arm/boot/dts/qcom/msmtitanium.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -705,6 +705,7 @@ clock_gcc_mdss: qcom,gcc-mdss@1800000 { compatible = "qcom,gcc-mdss-titanium"; reg = <0x1800000 0x80000>; reg-names = "cc_base"; clock-names = "pclk0_src", "pclk1_src", "byte0_src", "byte1_src"; clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_mux>, Loading