Loading Documentation/devicetree/bindings/arm/cpus.txt +0 −1 Original line number Diff line number Diff line Loading @@ -185,7 +185,6 @@ nodes to be present and contain the properties described below. be one of: "psci" "spin-table" "qcom,msm8996-acc" # On ARM 32-bit systems this property is optional and can be one of: Loading Documentation/devicetree/bindings/arm/msm/acc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,7 @@ register region per CPU within the APSS remapped region as well as an alias regi region that remaps accesses to the ACC associated with the CPU accessing the region. Required properties: - compatible: Must be "qcom,arm-cortex-acc" or "qcom,msm8996-acc" - compatible: Must be "qcom,arm-cortex-acc" - reg: The first element specifies the base address and size of the register region. An optional second element specifies the base address and size of the alias register region. Loading Documentation/devicetree/bindings/arm/msm/l2ccc.txt +2 −16 Original line number Diff line number Diff line Loading @@ -6,27 +6,13 @@ region per CPU Cluster. Required properties: - compatible: Can be one of: "qcom,8994-l2ccc" "qcom,8916-l2ccc" "qcom,msm8996-l2cc" - reg: This specifies the base address and size of the register region. Optional properties: - reg: An optional second tuple specifies the shared common base address required to trigger the L2 SPM out of power collapse. - qcom,vctl-node: Reference to a node that controls the power rails for the cluster. - qcom,vctl-val: The voltage control register value that must be set before the caches can be turned on. This would be a required property if the target necessitates a voltage rail be turned on before turning on the cache. Example: clock-controller@f900f000 { compatible = "qcom,8994-l2ccc""; reg = <0xf900f000 0x1000>, <0xf911210c 0x4>; qcom,vctl-node = <&cluster_node>; qcom,vctl-val = <0xb8>; compatible = "qcom,8916-l2ccc""; reg = <0xf900f000 0x1000>; } arch/arm/boot/dts/qcom/Makefile +11 −17 Original line number Diff line number Diff line ifeq ($(CONFIG_OF),y) dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-sim.dtb \ msm8996-v3-sim.dtb \ msm8996-v2-rumi.dtb \ msm8996-v3-rumi.dtb \ msm8996-v2-pmi8994-cdp.dtb \ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-pmi8994-cdp.dtb \ msm8996-v2-pmi8994-mtp.dtb \ msm8996-v2-pmi8994-pmk8001-cdp.dtb \ msm8996-v2-pmi8994-pmk8001-mtp.dtb \ Loading @@ -12,6 +8,8 @@ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-sim.dtb \ msm8996-v2-pmi8994-pm8004-mtp.dtb \ msm8996-v2-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v2-pmi8994-pm8004-pmk8001-mtp.dtb \ msm8996-v2-fluid.dtb \ msm8996-v2-liquid.dtb \ msm8996-v3-pmi8994-cdp.dtb \ msm8996-v3-pmi8994-mtp.dtb \ msm8996-v3-pmi8994-pmk8001-cdp.dtb \ Loading @@ -20,20 +18,16 @@ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-sim.dtb \ msm8996-v3-pmi8994-pm8004-mtp.dtb \ msm8996-v3-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v3-pmi8994-pm8004-pmk8001-mtp.dtb \ msm8996-v2-fluid.dtb \ msm8996-v3-fluid.dtb \ msm8996-v2-liquid.dtb \ msm8996-v3-liquid.dtb \ msm8996-v2.0-pmi8994-cdp.dtb \ msm8996-v2.0-pmi8994-mtp.dtb \ msm8996-v2.0-pmi8994-pmk8001-cdp.dtb \ msm8996-v2.0-pmi8994-pmk8001-mtp.dtb \ msm8996-v2.0-pmi8994-pm8004-cdp.dtb \ msm8996-v2.0-pmi8994-pm8004-mtp.dtb \ msm8996-v2.0-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v2.0-pmi8994-pm8004-pmk8001-mtp.dtb \ msm8996-v2.0-fluid.dtb \ msm8996-v2.0-liquid.dtb \ msm8996-v3.0-pmi8994-cdp.dtb \ msm8996-v3.0-pmi8994-mtp.dtb \ msm8996-v3.0-pmi8994-pm8004-cdp.dtb \ msm8996-v3.0-pmi8994-pm8004-mtp.dtb \ msm8996-v3.0-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v3.0-pmi8994-pmk8001-cdp.dtb \ msm8996-v3.0-fluid.dtb \ msm8996-v3.0-liquid.dtb \ apq8096-v2-liquid.dtb \ apq8096-v3-liquid.dtb \ apq8096-v2-dragonboard.dtb \ Loading arch/arm/boot/dts/qcom/msm8996-rumi.dtsideleted 100644 → 0 +0 −269 Original line number Diff line number Diff line /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include "msm8996-pinctrl.dtsi" / { model = "Qualcomm Technologies, Inc. MSM 8996 RUMI"; compatible = "qcom,msm8996-rumi", "qcom,msm8996", "qcom,rumi"; qcom,board-id = <15 0>; }; &clock_cpu { status = "disabled"; }; &apcc_cpr { status = "disabled"; }; &gfx_cpr { status = "disabled"; }; &spmi_bus { status = "disabled"; }; &sdhc_1 { vdd-supply = <&pm8994_l20>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 570000>; vdd-io-supply = <&pm8994_s4>; qcom,vdd-io-always-on; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <110 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000>; qcom,nonremovable; status = "ok"; }; &sdhc_2 { vdd-supply = <&pm8994_l21>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 800000>; vdd-io-supply = <&pm8994_l13>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &lmh { status = "disabled"; }; &wdog { status = "disabled"; }; &vmem { status = "disabled"; }; &uartblsp1dm1 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&uart_console_active>; }; &uartblsp2dm1 { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&uart_console_active>; }; &jpeg_smmu { status = "disable"; }; &vfe_smmu { status = "disable"; }; &cpp_fd_smmu { status = "disable"; }; &kgsl_smmu { status = "disable"; }; &venus_smmu { status = "disable"; }; &mdp_smmu { status = "disable"; }; &rot_smmu { status = "disable"; }; &lpass_q6_smmu { status = "disable"; }; &clock_gcc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; &clock_mmss { compatible = "qcom,dummycc"; #clock-cells = <1>; }; &clock_gpu { compatible = "qcom,dummycc"; #clock-cells = <1>; }; &clock_debug { status = "disable"; }; &gdsc_venus { status = "disable"; }; &gdsc_venus_core0 { status = "disable"; }; &gdsc_venus_core1 { status = "disable"; }; &gdsc_camss_top { status = "disable"; }; &gdsc_vfe0 { status = "disable"; }; &gdsc_vfe1 { status = "disable"; }; &gdsc_jpeg { status = "disable"; }; &gdsc_cpp { status = "disable"; }; &gdsc_fd { status = "disable"; }; &gdsc_mdss { status = "disable"; }; &gdsc_pcie_0 { status = "disable"; }; &gdsc_pcie_1 { status = "disable"; }; &gdsc_pcie_2 { status = "disable"; }; &gdsc_usb30 { status = "disable"; }; &gdsc_ufs { status = "disable"; }; &gdsc_gpu { status = "disable"; }; &gdsc_gpu_gx { status = "disable"; }; &gdsc_hlos1_vote_aggre0_noc { status = "disable"; }; &gdsc_hlos1_vote_lpass_adsp { status = "disable"; }; &gdsc_hlos1_vote_lpass_core { status = "disable"; }; &gdsc_aggre0_noc { status = "disable"; }; &gdsc_mmagic_bimc { status = "disable"; }; &gdsc_mmagic_video { status = "disable"; }; &gdsc_mmagic_mdss { status = "disable"; }; &gdsc_mmagic_camss { status = "disable"; }; &msm_vidc { status = "disable"; }; &qcom_rng { status = "disable"; }; &tpdm_vsense { status = "disable"; }; &tpdm_prng { status = "disable"; }; &rpm_bus { rpm-standalone; }; Loading
Documentation/devicetree/bindings/arm/cpus.txt +0 −1 Original line number Diff line number Diff line Loading @@ -185,7 +185,6 @@ nodes to be present and contain the properties described below. be one of: "psci" "spin-table" "qcom,msm8996-acc" # On ARM 32-bit systems this property is optional and can be one of: Loading
Documentation/devicetree/bindings/arm/msm/acc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,7 @@ register region per CPU within the APSS remapped region as well as an alias regi region that remaps accesses to the ACC associated with the CPU accessing the region. Required properties: - compatible: Must be "qcom,arm-cortex-acc" or "qcom,msm8996-acc" - compatible: Must be "qcom,arm-cortex-acc" - reg: The first element specifies the base address and size of the register region. An optional second element specifies the base address and size of the alias register region. Loading
Documentation/devicetree/bindings/arm/msm/l2ccc.txt +2 −16 Original line number Diff line number Diff line Loading @@ -6,27 +6,13 @@ region per CPU Cluster. Required properties: - compatible: Can be one of: "qcom,8994-l2ccc" "qcom,8916-l2ccc" "qcom,msm8996-l2cc" - reg: This specifies the base address and size of the register region. Optional properties: - reg: An optional second tuple specifies the shared common base address required to trigger the L2 SPM out of power collapse. - qcom,vctl-node: Reference to a node that controls the power rails for the cluster. - qcom,vctl-val: The voltage control register value that must be set before the caches can be turned on. This would be a required property if the target necessitates a voltage rail be turned on before turning on the cache. Example: clock-controller@f900f000 { compatible = "qcom,8994-l2ccc""; reg = <0xf900f000 0x1000>, <0xf911210c 0x4>; qcom,vctl-node = <&cluster_node>; qcom,vctl-val = <0xb8>; compatible = "qcom,8916-l2ccc""; reg = <0xf900f000 0x1000>; }
arch/arm/boot/dts/qcom/Makefile +11 −17 Original line number Diff line number Diff line ifeq ($(CONFIG_OF),y) dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-sim.dtb \ msm8996-v3-sim.dtb \ msm8996-v2-rumi.dtb \ msm8996-v3-rumi.dtb \ msm8996-v2-pmi8994-cdp.dtb \ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-pmi8994-cdp.dtb \ msm8996-v2-pmi8994-mtp.dtb \ msm8996-v2-pmi8994-pmk8001-cdp.dtb \ msm8996-v2-pmi8994-pmk8001-mtp.dtb \ Loading @@ -12,6 +8,8 @@ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-sim.dtb \ msm8996-v2-pmi8994-pm8004-mtp.dtb \ msm8996-v2-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v2-pmi8994-pm8004-pmk8001-mtp.dtb \ msm8996-v2-fluid.dtb \ msm8996-v2-liquid.dtb \ msm8996-v3-pmi8994-cdp.dtb \ msm8996-v3-pmi8994-mtp.dtb \ msm8996-v3-pmi8994-pmk8001-cdp.dtb \ Loading @@ -20,20 +18,16 @@ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-sim.dtb \ msm8996-v3-pmi8994-pm8004-mtp.dtb \ msm8996-v3-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v3-pmi8994-pm8004-pmk8001-mtp.dtb \ msm8996-v2-fluid.dtb \ msm8996-v3-fluid.dtb \ msm8996-v2-liquid.dtb \ msm8996-v3-liquid.dtb \ msm8996-v2.0-pmi8994-cdp.dtb \ msm8996-v2.0-pmi8994-mtp.dtb \ msm8996-v2.0-pmi8994-pmk8001-cdp.dtb \ msm8996-v2.0-pmi8994-pmk8001-mtp.dtb \ msm8996-v2.0-pmi8994-pm8004-cdp.dtb \ msm8996-v2.0-pmi8994-pm8004-mtp.dtb \ msm8996-v2.0-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v2.0-pmi8994-pm8004-pmk8001-mtp.dtb \ msm8996-v2.0-fluid.dtb \ msm8996-v2.0-liquid.dtb \ msm8996-v3.0-pmi8994-cdp.dtb \ msm8996-v3.0-pmi8994-mtp.dtb \ msm8996-v3.0-pmi8994-pm8004-cdp.dtb \ msm8996-v3.0-pmi8994-pm8004-mtp.dtb \ msm8996-v3.0-pmi8994-pm8004-pmk8001-cdp.dtb \ msm8996-v3.0-pmi8994-pmk8001-cdp.dtb \ msm8996-v3.0-fluid.dtb \ msm8996-v3.0-liquid.dtb \ apq8096-v2-liquid.dtb \ apq8096-v3-liquid.dtb \ apq8096-v2-dragonboard.dtb \ Loading
arch/arm/boot/dts/qcom/msm8996-rumi.dtsideleted 100644 → 0 +0 −269 Original line number Diff line number Diff line /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include "msm8996-pinctrl.dtsi" / { model = "Qualcomm Technologies, Inc. MSM 8996 RUMI"; compatible = "qcom,msm8996-rumi", "qcom,msm8996", "qcom,rumi"; qcom,board-id = <15 0>; }; &clock_cpu { status = "disabled"; }; &apcc_cpr { status = "disabled"; }; &gfx_cpr { status = "disabled"; }; &spmi_bus { status = "disabled"; }; &sdhc_1 { vdd-supply = <&pm8994_l20>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 570000>; vdd-io-supply = <&pm8994_s4>; qcom,vdd-io-always-on; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <110 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000>; qcom,nonremovable; status = "ok"; }; &sdhc_2 { vdd-supply = <&pm8994_l21>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 800000>; vdd-io-supply = <&pm8994_l13>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &lmh { status = "disabled"; }; &wdog { status = "disabled"; }; &vmem { status = "disabled"; }; &uartblsp1dm1 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&uart_console_active>; }; &uartblsp2dm1 { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&uart_console_active>; }; &jpeg_smmu { status = "disable"; }; &vfe_smmu { status = "disable"; }; &cpp_fd_smmu { status = "disable"; }; &kgsl_smmu { status = "disable"; }; &venus_smmu { status = "disable"; }; &mdp_smmu { status = "disable"; }; &rot_smmu { status = "disable"; }; &lpass_q6_smmu { status = "disable"; }; &clock_gcc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; &clock_mmss { compatible = "qcom,dummycc"; #clock-cells = <1>; }; &clock_gpu { compatible = "qcom,dummycc"; #clock-cells = <1>; }; &clock_debug { status = "disable"; }; &gdsc_venus { status = "disable"; }; &gdsc_venus_core0 { status = "disable"; }; &gdsc_venus_core1 { status = "disable"; }; &gdsc_camss_top { status = "disable"; }; &gdsc_vfe0 { status = "disable"; }; &gdsc_vfe1 { status = "disable"; }; &gdsc_jpeg { status = "disable"; }; &gdsc_cpp { status = "disable"; }; &gdsc_fd { status = "disable"; }; &gdsc_mdss { status = "disable"; }; &gdsc_pcie_0 { status = "disable"; }; &gdsc_pcie_1 { status = "disable"; }; &gdsc_pcie_2 { status = "disable"; }; &gdsc_usb30 { status = "disable"; }; &gdsc_ufs { status = "disable"; }; &gdsc_gpu { status = "disable"; }; &gdsc_gpu_gx { status = "disable"; }; &gdsc_hlos1_vote_aggre0_noc { status = "disable"; }; &gdsc_hlos1_vote_lpass_adsp { status = "disable"; }; &gdsc_hlos1_vote_lpass_core { status = "disable"; }; &gdsc_aggre0_noc { status = "disable"; }; &gdsc_mmagic_bimc { status = "disable"; }; &gdsc_mmagic_video { status = "disable"; }; &gdsc_mmagic_mdss { status = "disable"; }; &gdsc_mmagic_camss { status = "disable"; }; &msm_vidc { status = "disable"; }; &qcom_rng { status = "disable"; }; &tpdm_vsense { status = "disable"; }; &tpdm_prng { status = "disable"; }; &rpm_bus { rpm-standalone; };