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Commit 45d91080 authored by dmitry pervushin's avatar dmitry pervushin Committed by Russell King
Browse files

[ARM] 5465/1: Freescale STMP platform support [7/10] 



Sources: support for 37xx boards

Signed-off-by: default avatardmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 5cccd37e

arch/arm/mach-stmp37xx/Makefile

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obj-$(CONFIG_ARCH_STMP37XX) += stmp37xx.o

obj-$(CONFIG_MACH_STMP37XX) += stmp37xx_devb.o

arch/arm/mach-stmp37xx/Makefile.boot

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   zreladdr-y	:= 0x40008000

params_phys-y	:= 0x40000100

initrd_phys-y	:= 0x40800000

arch/arm/mach-stmp37xx/stmp37xx.c

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/*

 * Freescale STMP37XX platform support

 *

 * Embedded Alley Solutions, Inc <source@embeddedalley.com>

 *

 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 */



/*

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */

#include <linux/types.h>

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/device.h>

#include <linux/platform_device.h>

#include <linux/irq.h>

#include <linux/io.h>



#include <asm/setup.h>

#include <asm/mach-types.h>



#include <asm/mach/arch.h>

#include <asm/mach/irq.h>

#include <asm/mach/map.h>

#include <asm/mach/time.h>



#include <mach/stmp3xxx.h>

#include <mach/dma.h>



#include <mach/regs-icoll.h>

#include <mach/regs-apbh.h>

#include <mach/regs-apbx.h>

#include "stmp37xx.h"



/*

 * IRQ handling

 */

static void stmp37xx_ack_irq(unsigned int irq)

{

	/* Disable IRQ */

	HW_ICOLL_PRIORITYn_CLR(irq / 4, 0x04 << ((irq % 4) * 8));



	/* ACK current interrupt */

	HW_ICOLL_LEVELACK_WR(1);



	/* Barrier */

	(void) HW_ICOLL_STAT_RD();

}



static void stmp37xx_mask_irq(unsigned int irq)

{

	/* IRQ disable */

	HW_ICOLL_PRIORITYn_CLR(irq / 4, 0x04 << ((irq % 4) * 8));

}



static void stmp37xx_unmask_irq(unsigned int irq)

{

	/* IRQ enable */

	HW_ICOLL_PRIORITYn_SET(irq / 4, 0x04 << ((irq % 4) * 8));

}



static struct irq_chip stmp37xx_chip = {

	.ack	= stmp37xx_ack_irq,

	.mask	= stmp37xx_mask_irq,

	.unmask = stmp37xx_unmask_irq,

};



void __init stmp37xx_init_irq(void)

{

	stmp3xxx_init_irq(&stmp37xx_chip);

}



/*

 * DMA interrupt handling

 */

void stmp3xxx_arch_dma_enable_interrupt(int channel)

{

	int dmabus = channel / 16;



	switch (dmabus) {

	case STMP3XXX_BUS_APBH:

		HW_APBH_CTRL1_SET(1 << (8 + (channel % 16)));

		break;



	case STMP3XXX_BUS_APBX:

		HW_APBX_CTRL1_SET(1 << (8 + (channel % 16)));

		break;

	}

}

EXPORT_SYMBOL(stmp3xxx_arch_dma_enable_interrupt);



void stmp3xxx_arch_dma_clear_interrupt(int channel)

{

	int dmabus = channel / 16;



	switch (dmabus) {

	case STMP3XXX_BUS_APBH:

		HW_APBH_CTRL1_CLR(1 << (channel % 16));

		break;



	case STMP3XXX_BUS_APBX:

		HW_APBX_CTRL1_CLR(1 << (channel % 16));

		break;

	}

}

EXPORT_SYMBOL(stmp3xxx_arch_dma_clear_interrupt);



int stmp3xxx_arch_dma_is_interrupt(int channel)

{

	int r = 0;



	int dmabus = channel / 16;



	switch (dmabus) {

	case STMP3XXX_BUS_APBH:

		r = HW_APBH_CTRL1_RD() & (1 << (channel % 16));

		break;



	case STMP3XXX_BUS_APBX:

		r = HW_APBX_CTRL1_RD() & (1 << (channel % 16));

		break;

	}

	return r;

}

EXPORT_SYMBOL(stmp3xxx_arch_dma_is_interrupt);



void stmp3xxx_arch_dma_reset_channel(int channel)

{

	int dmabus = channel / 16;

	unsigned chbit = 1 << (channel % 16);



	switch (dmabus) {

	case STMP3XXX_BUS_APBH:

		/* Reset channel and wait for it to complete */

		HW_APBH_CTRL0_SET(chbit << BP_APBH_CTRL0_RESET_CHANNEL);

		while (HW_APBH_CTRL0_RD() &

		       (chbit << BP_APBH_CTRL0_RESET_CHANNEL))

			continue;

		break;



	case STMP3XXX_BUS_APBX:

		/* Reset channel and wait for it to complete */

		HW_APBX_CTRL0_SET(chbit << BP_APBX_CTRL0_RESET_CHANNEL);

		while (HW_APBX_CTRL0_RD() &

		       (chbit << BP_APBX_CTRL0_RESET_CHANNEL))

			continue;

		break;

	}

}

EXPORT_SYMBOL(stmp3xxx_arch_dma_reset_channel);



void stmp3xxx_arch_dma_freeze(int channel)

{

	int dmabus = channel / 16;

	unsigned chbit = 1 << (channel % 16);



	switch (dmabus) {

	case STMP3XXX_BUS_APBH:

		HW_APBH_CTRL0_SET(1<<chbit);

		break;

	case STMP3XXX_BUS_APBX:

		HW_APBX_CTRL0_SET(1<<chbit);

		break;

	}

}

EXPORT_SYMBOL(stmp3xxx_arch_dma_freeze);



void stmp3xxx_arch_dma_unfreeze(int channel)

{

	int dmabus = channel / 16;

	unsigned chbit = 1 << (channel % 16);



	switch (dmabus) {

	case STMP3XXX_BUS_APBH:

		HW_APBH_CTRL0_CLR(1<<chbit);

		break;

	case STMP3XXX_BUS_APBX:

		HW_APBX_CTRL0_CLR(1<<chbit);

		break;

	}

}

EXPORT_SYMBOL(stmp3xxx_arch_dma_unfreeze);



/*

 * The registers are all very closely mapped, so we might as well map them all

 * with a single mapping

 *

 * Logical      Physical

 * f0000000	80000000	On-chip registers

 * f1000000	00000000	256k on-chip SRAM

 */

static struct map_desc stmp37xx_io_desc[] __initdata = {

	{

		.virtual	= (u32)STMP3XXX_REGS_BASE,

		.pfn		= __phys_to_pfn(STMP3XXX_REGS_PHBASE),

		.length		= SZ_1M,

		.type		= MT_DEVICE

	},

	{

		.virtual	= (u32)STMP3XXX_OCRAM_BASE,

		.pfn		= __phys_to_pfn(STMP3XXX_OCRAM_PHBASE),

		.length		= STMP3XXX_OCRAM_SIZE,

		.type		= MT_DEVICE,

	},

};



void __init stmp37xx_map_io(void)

{

	iotable_init(stmp37xx_io_desc, ARRAY_SIZE(stmp37xx_io_desc));

}

arch/arm/mach-stmp37xx/stmp37xx.h

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/*

 * Freescale STMP37XX/STMP378X internal functions and data declarations

 *

 * Embedded Alley Solutions, Inc <source@embeddedalley.com>

 *

 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 */



/*

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */

#ifndef __MACH_STMP37XX_H

#define __MACH_STMP37XX_H



void stmp37xx_map_io(void);

void stmp37xx_init_irq(void);



#endif /* __MACH_STMP37XX_H */

arch/arm/mach-stmp37xx/stmp37xx_devb.c

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/*

 * Freescale STMP37XX development board support

 *

 * Embedded Alley Solutions, Inc <source@embeddedalley.com>

 *

 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 */



/*

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/device.h>

#include <linux/platform_device.h>

#include <asm/setup.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>



#include <mach/stmp3xxx.h>

#include <mach/pins.h>

#include <mach/pinmux.h>

#include "stmp37xx.h"



/*

 * List of STMP37xx development board specific devices

 */

static struct platform_device *stmp37xx_devb_devices[] = {

	&stmp3xxx_dbguart,

};



static struct pin_desc dbguart_pins_0[] = {

	{ PINID_PWM0, PIN_FUN3, },

	{ PINID_PWM1, PIN_FUN3, },

};



static struct pin_group dbguart_pins[] = {

	[0] = {

		.pins		= dbguart_pins_0,

		.nr_pins	= ARRAY_SIZE(dbguart_pins_0),

	},

};



static int dbguart_pins_control(int id, int request)

{

	int r = 0;



	if (request)

		r = stmp3xxx_request_pin_group(&dbguart_pins[id], "debug uart");

	else

		stmp3xxx_release_pin_group(&dbguart_pins[id], "debug uart");

	return r;

}





static void __init stmp37xx_devb_init(void)

{

	stmp3xxx_pinmux_init(NR_REAL_IRQS);



	/* Init STMP3xxx platform */

	stmp3xxx_init();



	stmp3xxx_dbguart.dev.platform_data = dbguart_pins_control;

	/* Add STMP37xx development board devices */

	platform_add_devices(stmp37xx_devb_devices,

			ARRAY_SIZE(stmp37xx_devb_devices));

}



MACHINE_START(STMP37XX, "STMP37XX")

	.phys_io	= 0x80000000,

	.io_pg_offst	= ((0xf0000000) >> 18) & 0xfffc,

	.boot_params	= 0x40000100,

	.map_io		= stmp37xx_map_io,

	.init_irq	= stmp37xx_init_irq,

	.timer		= &stmp3xxx_timer,

	.init_machine	= stmp37xx_devb_init,

MACHINE_END