drm/nv50: implement gpio set/get routines (45284162) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/gpu/drm/nouveau/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -22,7 +22,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
		nv50_cursor.o nv50_display.o nv50_fbcon.o \
		nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
		nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \
		nv17_gpio.o
		nv17_gpio.o nv50_gpio.o

		nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o
		nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o

drivers/gpu/drm/nouveau/nouveau_bios.c

+5 −6

Original line number	Diff line number	Diff line
		@@ -2574,7 +2574,6 @@ init_gpio(struct nvbios bios, uint16_t offset, struct init_exec iexec)
		*/

		struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
		const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };
		const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c };
		int i;

		@@ -2592,12 +2591,12 @@ init_gpio(struct nvbios bios, uint16_t offset, struct init_exec iexec)

		BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, gpio->entry);

		r = nv50_gpio_reg[gpio->line >> 3];
		s = (gpio->line & 0x07) << 2;
		v = bios_rd32(bios, r) & ~(0x00000003 << s);
		v \|= (gpio->state[gpio->state_default] ^ 2) << s;
		bios_wr32(bios, r, v);
		nv50_gpio_set(bios->dev, gpio->tag, gpio->state_default);

		/* The NVIDIA binary driver doesn't appear to actually do
		* any of this, my VBIOS does however.
		*/
		/* Not a clue, needs de-magicing */
		r = nv50_gpio_ctl[gpio->line >> 4];
		s = (gpio->line & 0x0f);
		v = bios_rd32(bios, r) & ~(0x00010001 << s);

drivers/gpu/drm/nouveau/nouveau_drv.h

+4 −0

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		@@ -1162,6 +1162,10 @@ extern int nouveau_gem_ioctl_info(struct drm_device , void ,
		int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
		int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);

		/* nv50_gpio.c */
		int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
		int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);

		#ifndef ioread32_native
		#ifdef __BIG_ENDIAN
		#define ioread16_native ioread16be

drivers/gpu/drm/nouveau/nv50_gpio.c

0 → 100644

+76 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright 2010 Red Hat Inc.
		*
		* Permission is hereby granted, free of charge, to any person obtaining a
		* copy of this software and associated documentation files (the "Software"),
		* to deal in the Software without restriction, including without limitation
		* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		* and/or sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following conditions:
		*
		* The above copyright notice and this permission notice shall be included in
		* all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
		* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
		* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*
		* Authors: Ben Skeggs
		*/

		#include "drmP.h"
		#include "nouveau_drv.h"
		#include "nouveau_hw.h"

		static int
		nv50_gpio_location(struct dcb_gpio_entry gpio, uint32_t reg, uint32_t *shift)
		{
		const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };

		if (gpio->line > 32)
		return -EINVAL;

		*reg = nv50_gpio_reg[gpio->line >> 3];
		*shift = (gpio->line & 7) << 2;
		return 0;
		}

		int
		nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag)
		{
		struct dcb_gpio_entry *gpio;
		uint32_t r, s, v;

		gpio = nouveau_bios_gpio_entry(dev, tag);
		if (!gpio)
		return -ENOENT;

		if (nv50_gpio_location(gpio, &r, &s))
		return -EINVAL;

		v = nv_rd32(dev, r) >> (s + 2);
		return ((v & 1) == (gpio->state[1] & 1));
		}

		int
		nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state)
		{
		struct dcb_gpio_entry *gpio;
		uint32_t r, s, v;

		gpio = nouveau_bios_gpio_entry(dev, tag);
		if (!gpio)
		return -ENOENT;

		if (nv50_gpio_location(gpio, &r, &s))
		return -EINVAL;

		v = nv_rd32(dev, r) & ~(0x3 << s);
		v \|= (gpio->state[state] ^ 2) << s;
		nv_wr32(dev, r, v);
		return 0;
		}