Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 451fd82d authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Liam Girdwood
Browse files

OMAP3: McBSP: Change the way how the FIFO is handled 



Use the actual FIFO size in words as buffer_size on OMAP3.
Change the threshold configuration to use 1 based numbering, when
specifying the allowed threshold maximum or the McBSP threshold value.
Set the default maximum threshold to (buffer_size - 0x10) intialy.
>From users of McBSP, now it is expected to use this method.
Asking for threshold 1 means that the value written to threshold registers
are going to be 0, which means 1 word threshold.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: default avatarJarkko Nikula <jhnikula@gmail.com>
Acked-by: default avatarMark Brown <broonie@opensource.wolsfonmicro.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
parent 0acce82b

arch/arm/mach-omap2/mcbsp.c

+5 −5
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 
		.rx_irq		= INT_24XX_MCBSP1_IRQ_RX,

		.tx_irq		= INT_24XX_MCBSP1_IRQ_TX,

		.ops		= &omap2_mcbsp_ops,

		.buffer_size	= 0x6F,

		.buffer_size	= 0x80, /* The FIFO has 128 locations */

	},

	{

		.phys_base	= OMAP34XX_MCBSP2_BASE,
@@ -143,7 +143,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 
		.rx_irq		= INT_24XX_MCBSP2_IRQ_RX,

		.tx_irq		= INT_24XX_MCBSP2_IRQ_TX,

		.ops		= &omap2_mcbsp_ops,

		.buffer_size	= 0x3FF,

		.buffer_size	= 0x500, /* The FIFO has 1024 + 256 locations */

	},

	{

		.phys_base	= OMAP34XX_MCBSP3_BASE,
@@ -153,7 +153,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 
		.rx_irq		= INT_24XX_MCBSP3_IRQ_RX,

		.tx_irq		= INT_24XX_MCBSP3_IRQ_TX,

		.ops		= &omap2_mcbsp_ops,

		.buffer_size	= 0x6F,

		.buffer_size	= 0x80, /* The FIFO has 128 locations */

	},

	{

		.phys_base	= OMAP34XX_MCBSP4_BASE,
@@ -162,7 +162,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 
		.rx_irq		= INT_24XX_MCBSP4_IRQ_RX,

		.tx_irq		= INT_24XX_MCBSP4_IRQ_TX,

		.ops		= &omap2_mcbsp_ops,

		.buffer_size	= 0x6F,

		.buffer_size	= 0x80, /* The FIFO has 128 locations */

	},

	{

		.phys_base	= OMAP34XX_MCBSP5_BASE,
@@ -171,7 +171,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 
		.rx_irq		= INT_24XX_MCBSP5_IRQ_RX,

		.tx_irq		= INT_24XX_MCBSP5_IRQ_TX,

		.ops		= &omap2_mcbsp_ops,

		.buffer_size	= 0x6F,

		.buffer_size	= 0x80, /* The FIFO has 128 locations */

	},

};

#define OMAP34XX_MCBSP_PDATA_SZ		ARRAY_SIZE(omap34xx_mcbsp_pdata)

arch/arm/plat-omap/mcbsp.c

+20 −10
Original line number Diff line number Diff line
@@ -481,9 +481,9 @@ int omap_st_is_enabled(unsigned int id) 
EXPORT_SYMBOL(omap_st_is_enabled);



/*

 * omap_mcbsp_set_tx_threshold configures how to deal

 * with transmit threshold. the threshold value and handler can be

 * configure in here.

 * omap_mcbsp_set_rx_threshold configures the transmit threshold in words.

 * The threshold parameter is 1 based, and it is converted (threshold - 1)

 * for the THRSH2 register.

 */

void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)

{
@@ -498,14 +498,15 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) 
	}

	mcbsp = id_to_mcbsp_ptr(id);



	MCBSP_WRITE(mcbsp, THRSH2, threshold);

	if (threshold && threshold <= mcbsp->max_tx_thres)

		MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);

}

EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);



/*

 * omap_mcbsp_set_rx_threshold configures how to deal

 * with receive threshold. the threshold value and handler can be

 * configure in here.

 * omap_mcbsp_set_rx_threshold configures the receive threshold in words.

 * The threshold parameter is 1 based, and it is converted (threshold - 1)

 * for the THRSH1 register.

 */

void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)

{
@@ -520,7 +521,8 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) 
	}

	mcbsp = id_to_mcbsp_ptr(id);



	MCBSP_WRITE(mcbsp, THRSH1, threshold);

	if (threshold && threshold <= mcbsp->max_rx_thres)

		MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);

}

EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
@@ -1697,8 +1699,16 @@ static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) 
{

	mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;

	if (cpu_is_omap34xx()) {

		mcbsp->max_tx_thres = max_thres(mcbsp);

		mcbsp->max_rx_thres = max_thres(mcbsp);

		/*

		 * Initially configure the maximum thresholds to a safe value.

		 * The McBSP FIFO usage with these values should not go under

		 * 16 locations.

		 * If the whole FIFO without safety buffer is used, than there

		 * is a possibility that the DMA will be not able to push the

		 * new data on time, causing channel shifts in runtime.

		 */

		mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;

		mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;

		/*

		 * REVISIT: Set dmap_op_mode to THRESHOLD as default

		 * for mcbsp2 instances.